erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

tegra132: fix compilation error

Browse source 
Two commits were inflight that affected one another. Fix the
build breakage.

BUG=None
BRANCH=None
TEST=Built.

Change-Id: I72a268fe1e1e06a6eaacf955320786180de3b070
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/216890
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Aaron Durbin 2014-09-06 00:42:47 -05:00 • committed by chrome-internal-fetch
commit 62669c5754
1 changed files with 2 additions and 5 deletions
Download patch file Download diff file Expand all files Collapse all files

7
src/soc/nvidia/tegra132/i2c6.c
View file

@ -89,11 +89,8 @@ void soc_configure_i2c6pad(void)
remove_clamps(POWER_PARTID_SOR);
unreset_sor_periphs();
/*
* Host1X needs a valid clock source so DPAUX can be accessed. Note that
* 4 is the PLLP_OUT0 source for this register.
*/
clock_configure_irregular_source(host1x, PLLP, 204000, 4);
/* Host1X needs a valid clock source so DPAUX can be accessed. */
clock_configure_source(host1x, PLLP, 204000);
/* Now we can write the I2C6 mux in DPAUX */
write32(I2C6_PADCTL, (void *)DPAUX_HYBRID_PADCTL);