From 62669c575475eefbe209fa6caa33432a86d08659 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Sat, 6 Sep 2014 00:42:47 -0500 Subject: [PATCH] tegra132: fix compilation error Two commits were inflight that affected one another. Fix the build breakage. BUG=None BRANCH=None TEST=Built. Change-Id: I72a268fe1e1e06a6eaacf955320786180de3b070 Signed-off-by: Aaron Durbin Reviewed-on: https://chromium-review.googlesource.com/216890 Reviewed-by: Furquan Shaikh Commit-Queue: Furquan Shaikh --- src/soc/nvidia/tegra132/i2c6.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/src/soc/nvidia/tegra132/i2c6.c b/src/soc/nvidia/tegra132/i2c6.c index 644c89ddb3..dcaf03317e 100644 --- a/src/soc/nvidia/tegra132/i2c6.c +++ b/src/soc/nvidia/tegra132/i2c6.c @@ -89,11 +89,8 @@ void soc_configure_i2c6pad(void) remove_clamps(POWER_PARTID_SOR); unreset_sor_periphs(); - /* - * Host1X needs a valid clock source so DPAUX can be accessed. Note that - * 4 is the PLLP_OUT0 source for this register. - */ - clock_configure_irregular_source(host1x, PLLP, 204000, 4); + /* Host1X needs a valid clock source so DPAUX can be accessed. */ + clock_configure_source(host1x, PLLP, 204000); /* Now we can write the I2C6 mux in DPAUX */ write32(I2C6_PADCTL, (void *)DPAUX_HYBRID_PADCTL);