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soc/intel/pantherlake: Add CD clock frequency control support

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This change adds support for configuring higher CD Clock frequencies
for VGA SOL initialization during the Pre-Memory phase.
This feature allows BIOS to request specific display core clock
frequencies when VGA support is enabled during MRC training.

The VgaInitControl field in IGPU_PEI_PREMEM_CONFIG has been extended
to include BIT6-7 for CD Clock frequency selection:
* 0: No higher CD Clock required
* 1: 442 MHz
* 2: 461 MHz

BUG=b:458353982
TEST=Build and boot fatcat/lapis, verify display initialization.

Change-Id: I82fae0d21bb83ed26aad73b830ed15fcd626a9ae
Signed-off-by: Alok Agarwal <alok.agarwal@intel.com>
Signed-off-by: Sowmya V <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90795
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sowmya V 2026-01-14 10:33:39 +05:30 • committed by Subrata Banik
commit 6186399a0f
2 changed files with 27 additions and 0 deletions
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13
src/soc/intel/pantherlake/chip.h
View file

@ -758,6 +758,19 @@ struct soc_intel_pantherlake_config {
/* Disable the progress bar during MRC training operations. */
bool disable_progress_bar;
/*
* VgaInitControl CD Clock Frequency Selection
* 0: CD_CLK_NONE - No higher CD Clock required
* 1: CD_CLK_442MHZ - 441 MHz
* 2: CD_CLK_461MHZ - 461 MHz
*/
enum cd_clock {
CD_CLK_NONE = 0,
CD_CLK_442MHZ,
CD_CLK_461MHZ,
MAX_CD_CLOCK = CD_CLK_461MHZ
} vga_cd_clk_freq_sel;
};
typedef struct soc_intel_pantherlake_config config_t;

14
src/soc/intel/pantherlake/romstage/ux.c
View file

@ -50,6 +50,17 @@ static void setup_vga_mode12_params(FSP_M_CONFIG *m_cfg, enum ux_locale_msg id)
m_cfg->VgaInitControl |= VGA_INIT_CONTROL_MODE12_MONOCHROME;
}
static void set_cd_clock(FSP_M_CONFIG *m_cfg, enum cd_clock clk)
{
if (clk > MAX_CD_CLOCK) {
printk(BIOS_ERR, "CD Clock setting out of bounds!\n");
return;
}
m_cfg->VgaInitControl = (m_cfg->VgaInitControl & ~(0x3 << 6)) | (clk << 6);
printk(BIOS_DEBUG, "CD Clock: %d\n", clk);
}
static bool ux_inform_user_of_operation(const char *name, enum ux_locale_msg id,
FSPM_UPD *mupd)
{
@ -90,6 +101,9 @@ static bool ux_inform_user_of_operation(const char *name, enum ux_locale_msg id,
m_cfg->VgaInitControl = VGA_INIT_CONTROL_ENABLE;
if (config->disable_progress_bar)
m_cfg->VgaInitControl |= VGA_INIT_DISABLE_ANIMATION;
set_cd_clock(m_cfg, config->vga_cd_clk_freq_sel);
m_cfg->VbtPtr = (efi_uintn_t)vbt;
m_cfg->VbtSize = vbt_size;
m_cfg->LidStatus = CONFIG(VBOOT_LID_SWITCH) ? get_lid_switch() : CONFIG(RUN_FSP_GOP);