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mb/trulo/var/uldrenite: Support different ISH UART mappings

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Due to the ISH UART configuration change and the need to support
different phases of the motherboard, we use the board ID to
distinguish which configuration to apply.

BUG=b:415605630, b:411249861
TEST=emerge-nissa coreboot

Change-Id: Id6e0e67595d3b4a44382ce82d160fe865cda275c
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87567
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
This commit is contained in:
John Su 2025-05-07 00:56:32 +08:00 • committed by Matt DeVillier
commit 60916d0f10
1 changed files with 49 additions and 5 deletions
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54
src/mainboard/google/brya/variants/uldrenite/variant.c
View file

@ -41,7 +41,7 @@ static const struct pad_config lte_disable_pads[] = {
PAD_NC(GPP_H23, NONE),
};
static const struct pad_config ish_disable_pads[] = {
static const struct pad_config ish_uart0_disable_pads[] = {
/* A16 : ISH_GP5 ==> NC */
PAD_NC_LOCK(GPP_A16, NONE, LOCK_CONFIG),
/* B5 : GPP_B5 ==> NC */
@ -58,8 +58,38 @@ static const struct pad_config ish_disable_pads[] = {
PAD_NC_LOCK(GPP_E9, NONE, LOCK_CONFIG),
};
static const struct pad_config switch_ish_uart1_pads[] = {
/* D13 : UART0_ISH_RXD ==> NC */
PAD_NC(GPP_D13, NONE),
/* D14 : UART0_ISH_TXD ==> LCD_CBL_DET# */
PAD_CFG_GPO(GPP_D14, 1, DEEP),
/* D17 : NC ==> UART1_ISH_RDX */
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF2),
/* D18 : LCD_CBL_DET# ==> UART1_ISH_TDX */
PAD_CFG_NF(GPP_D18, NONE, DEEP, NF2),
};
static const struct pad_config ish_uart1_disable_pads[] = {
/* A16 : ISH_GP5 ==> NC */
PAD_NC_LOCK(GPP_A16, NONE, LOCK_CONFIG),
/* B5 : GPP_B5 ==> NC */
PAD_NC(GPP_B5, NONE),
/* B6 : GPP_B6 ==> NC */
PAD_NC(GPP_B6, NONE),
/* D1 : ISH_GP1 ==> NC */
PAD_NC(GPP_D1, NONE),
/* D17 : UART1_ISH_RDX ==> NC */
PAD_NC(GPP_D17, NONE),
/* D18 : UART1_ISH_TDX ==> NC*/
PAD_NC(GPP_D18, NONE),
/* E9 : SOC_ACC2_INT ==> NC */
PAD_NC_LOCK(GPP_E9, NONE, LOCK_CONFIG),
};
void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
{
uint32_t board_version = board_id();
if (fw_config_probe(FW_CONFIG(TOUCHSCREEN, TOUCHSCREEN_NONE))) {
printk(BIOS_INFO, "Disable touchscreen GPIO pins.\n");
gpio_padbased_override(padbased_table, touchscreen_disable_pads,
@ -70,10 +100,24 @@ void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
gpio_padbased_override(padbased_table, lte_disable_pads,
ARRAY_SIZE(lte_disable_pads));
}
if (!fw_config_probe(FW_CONFIG(ISH, ISH_ENABLE))) {
printk(BIOS_INFO, "Disable ISH GPIO pins.\n");
gpio_padbased_override(padbased_table, ish_disable_pads,
ARRAY_SIZE(ish_disable_pads));
/* b/415605630: Support different ISH UART mappings according the board id */
if (board_version < 2) {
/* Override ISH UART0 to ISH UART1 */
gpio_padbased_override(padbased_table, switch_ish_uart1_pads,
ARRAY_SIZE(switch_ish_uart1_pads));
if (!fw_config_probe(FW_CONFIG(ISH, ISH_ENABLE))) {
printk(BIOS_INFO, "Disable ISH GPIO pins is based on ISH UART1.\n");
gpio_padbased_override(padbased_table, ish_uart1_disable_pads,
ARRAY_SIZE(ish_uart1_disable_pads));
}
} else {
if (!fw_config_probe(FW_CONFIG(ISH, ISH_ENABLE))) {
printk(BIOS_INFO, "Disable ISH GPIO pins is based on ISH UART0.\n");
gpio_padbased_override(padbased_table, ish_uart0_disable_pads,
ARRAY_SIZE(ish_uart0_disable_pads));
}
}
}