soc/intel/skylake: Use CSE reset status for reset

send_global_reset() now returns cse_tx_rx_status, and  skips the
CF9 reset only when CSE reports CSE_TX_RX_SUCCESS.

Test=Disable and enable the Intel ME on labtop_kbl and verify the
system actually resets, rather than hanging.

Change-Id: I5003ea9486a383ee7a4cace20ce6a54b0f94a166
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90274
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>

src/soc/intel/skylake/include/soc/me.h

@@ -3,6 +3,8 @@
 #ifndef _SKYLAKE_ME_H_
 #define _SKYLAKE_ME_H_
 
+#include <intelblocks/cse.h>
+
 /*
  * Management Engine PCI registers
  */
@@ -189,6 +191,6 @@ union me_hfsts6 {
 };
 
 void intel_me_status(void);
-int send_global_reset(void);
+enum cse_tx_rx_status send_global_reset(void);
 
 #endif

src/soc/intel/skylake/me.c

@@ -338,9 +338,9 @@ void intel_me_status(void)
 	}
 }
 
-int send_global_reset(void)
+enum cse_tx_rx_status send_global_reset(void)
 {
-	int status = 0;
+	enum cse_tx_rx_status status = CSE_TX_ERR_CSE_NOT_READY;
 	union me_hfsts1 hfs1;
 
 	if (!is_cse_enabled())

src/soc/intel/skylake/reset.c

@@ -22,7 +22,7 @@ static void do_force_global_reset(void)
 
 void do_global_reset(void)
 {
-	if (!send_global_reset()) {
+	if (send_global_reset() != CSE_TX_RX_SUCCESS) {
 		/* If ME unable to reset platform then
 		 * force global reset using PMC CF9GR register*/
 		do_force_global_reset();