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mb/starlabs/starlite_adl: Correct MODEM_CLKREQ configuration

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This GPIO is used as MODEM_CLKREQ, which is Native Function 1.
Adjust the configuration accordingly.

Change-Id: Icc8be62e620a3e51826fb7c2c040da317e7eb470
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86125
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes 2025-01-23 13:47:31 +00:00
commit 5deea4ca73
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c
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@ -296,8 +296,8 @@ const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1),
/* F4: CNV RF Reset */
PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),
/* F5: Not used MODEM_CLKREQ */
PAD_CFG_NF(GPP_F5, NONE, DEEP, NF2),
/* F5: MODEM_CLKREQ */
PAD_CFG_NF(GPP_F5, NONE, DEEP, NF1),
/* F6: CNV PA Blanking */
PAD_NC(GPP_F6, NONE),
/* F7: TBT LSX VCCIO Weak Internal PD 20K