the multiboot map is generated too early in
arch_write_tables(), before a number of routines that write/reserve stuff are executed (in my test this only affects the 0x0-0x500 region but I notice there's other stuff too). Attached patch moves it down, solving the problem. Because stage1 can no longer assume the MBI is at 0xf0000, I had to add a return path for stage2 to give it a pointer, using its exit status value. Signed-off-by: Robert Millan <rmh@aybabtu.com> Acked-by: Jordan Crouse <jordan.crouse@amd.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@936 f3766cd6-281f-0410-b1cd-43a5c92072e9
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5 changed files with 26 additions and 21 deletions
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@ -30,7 +30,7 @@
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* defined here.
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*/
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struct lb_memory *write_tables(void);
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void *write_tables(void);
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/* The coreboot table information is for conveying information
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* from the firmware to the loaded OS image. Primarily this
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@ -270,7 +270,7 @@ struct cmos_checksum {
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#define CHECKSUM_PCBIOS 1
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};
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struct lb_memory *arch_write_tables(void);
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void *arch_write_tables(void);
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unsigned long write_coreboot_table(
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unsigned long low_table_start, unsigned long low_table_end,
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unsigned long rom_table_start, unsigned long rom_table_end);
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