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soc/intel/xeon_xp: Remove 1 bytes losing in lower DRAM

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Generally the base address of FSP output is already aligned so there is
no need to minus 1. The current code loses 1 byte in the lower DRAM
address space.

Change-Id: Ia8147702aad496c431cf10b896d68a826c9e45b1
Signed-off-by: Yuchi Chen <yuchi.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85434
Reviewed-by: Jincheng Li <jincheng.li@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
This commit is contained in:
Yuchi Chen 2024-12-02 10:14:10 +08:00 • committed by Lean Sheng Tan
commit 5cedebf874
1 changed files with 1 additions and 1 deletions
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src/soc/intel/xeon_sp/uncore.c
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@ -268,7 +268,7 @@ static void mc_add_dram_resources(struct device *dev, int *res_count)
/* 1MB -> top_of_ram */
fsp_find_reserved_memory(&fsp_mem);
top_of_ram = range_entry_base(&fsp_mem) - 1;
top_of_ram = range_entry_base(&fsp_mem);
res = ram_from_to(dev, index++, 1 * MiB, top_of_ram);
LOG_RESOURCE("low_ram", dev, res);