From 5cedebf874ff12ff949c1a689f995ab95506ed62 Mon Sep 17 00:00:00 2001 From: Yuchi Chen Date: Mon, 2 Dec 2024 10:14:10 +0800 Subject: [PATCH] soc/intel/xeon_xp: Remove 1 bytes losing in lower DRAM Generally the base address of FSP output is already aligned so there is no need to minus 1. The current code loses 1 byte in the lower DRAM address space. Change-Id: Ia8147702aad496c431cf10b896d68a826c9e45b1 Signed-off-by: Yuchi Chen Reviewed-on: https://review.coreboot.org/c/coreboot/+/85434 Reviewed-by: Jincheng Li Tested-by: build bot (Jenkins) Reviewed-by: Shuo Liu --- src/soc/intel/xeon_sp/uncore.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/intel/xeon_sp/uncore.c b/src/soc/intel/xeon_sp/uncore.c index 1d77675aeb..93677b9c9c 100644 --- a/src/soc/intel/xeon_sp/uncore.c +++ b/src/soc/intel/xeon_sp/uncore.c @@ -268,7 +268,7 @@ static void mc_add_dram_resources(struct device *dev, int *res_count) /* 1MB -> top_of_ram */ fsp_find_reserved_memory(&fsp_mem); - top_of_ram = range_entry_base(&fsp_mem) - 1; + top_of_ram = range_entry_base(&fsp_mem); res = ram_from_to(dev, index++, 1 * MiB, top_of_ram); LOG_RESOURCE("low_ram", dev, res);