From 5cc4b9e6ce812d5d024e616c2a2c548ec1cf41d8 Mon Sep 17 00:00:00 2001 From: Maximilian Brune Date: Sat, 15 Mar 2025 14:48:35 +0100 Subject: [PATCH] soc/amd/common/cpu/noncar: Add bootblock overlap detection Currently overlaps with bootblock are not detected by our linker script. So increasing the PSP_SHAREDMEM_BASE + size to an extent that would overlap with bootblock would be just ignored. Add another region for the sole purpose of detecting these overlaps. This may not be the ideal solution, but should sufficient for now. Also check that the actual loadable segment of bootblock does not use up more space then that. Tested: Check that GCC and Clang can still compile it and that the loadable segment (and therefore what PSP loads into memory) does not change. Signed-off-by: Maximilian Brune Change-Id: I0f82f9b8655908676dc2d6545e72cb40fe9110e1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/86862 Reviewed-by: Felix Held Reviewed-by: Patrick Rudolph Tested-by: build bot (Jenkins) --- src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld index 1161e38448..4372de8760 100644 --- a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld +++ b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld @@ -95,6 +95,7 @@ SECTIONS PSP_SHAREDMEM_DRAM_END(CONFIG_PSP_SHAREDMEM_BASE + CONFIG_PSP_SHAREDMEM_SIZE) #endif _ = ASSERT(BOOTBLOCK_END == ((BOOTBLOCK_END + 0xFFFF) & 0xFFFF0000), "Bootblock end must be 16 bit aligned"); + REGION(bootblock_overlap_detection, BOOTBLOCK_ADDR, CONFIG_C_ENV_BOOTBLOCK_SIZE, 1) ROMSTAGE(CONFIG_ROMSTAGE_ADDR, CONFIG_ROMSTAGE_SIZE) #if CONFIG(PLATFORM_USES_FSP2_0) @@ -214,5 +215,7 @@ SECTIONS { BYTE(0xff); } >resetsection _ebootblock = BOOTBLOCK_END; + + ASSERT(_ebootblock - _bootblock <= CONFIG_C_ENV_BOOTBLOCK_SIZE, "CONFIG_C_ENV_BOOTBLOCK_SIZE is not big enough") } #endif /* ENV_BOOTBLOCK */