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mb/google/nissa/var/dirks: Correct PCIe RP 11 for WIFI7

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According the schematic to correct PCIe RP 11 for WIFI7.

BUG=b:388117663
TEST=build pass and insure WLAN function work properly

Change-Id: I84e9fc707c23099d7cd7ea2d8acde1043325f06b
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86934
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
This commit is contained in:
David Wu 2025-03-20 09:17:09 +08:00 • committed by Subrata Banik
commit 5ac7f635a5
1 changed files with 1 additions and 1 deletions
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src/mainboard/google/brya/variants/dirks/overridetree.cb
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@ -240,7 +240,7 @@ chip soc/intel/alderlake
# Enable wlan PCIe 11 using clk 2
probe WIFI_TYPE WIFI_PCIE
probe WIFI_TYPE WIFI_ALL
register "pch_pcie_rp[PCH_RP(10)]" = "{
register "pch_pcie_rp[PCH_RP(11)]" = "{
.clk_src = 2,
.clk_req = 2,
.flags = PCIE_RP_LTR | PCIE_RP_AER,