mb/google/nissa/var/dirks: Enable PCIE port 7 for Ethernet

Enable PCIE port 7 using clk 3 for RTL8111H Ethernet.

BUG=b:388117663
TEST=build pass and insure LAN function work properly

Change-Id: I60c30f207aa92ba9f52da0b95b647307a73e9d13
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86930
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
David Wu 2025-03-19 18:32:07 +08:00 committed by Subrata Banik
commit b9565f7817
2 changed files with 17 additions and 0 deletions

View file

@ -223,6 +223,9 @@ config BOARD_GOOGLE_CROTA
config BOARD_GOOGLE_DIRKS
select BOARD_GOOGLE_BASEBOARD_NISSA
select RT8168_GEN_ACPI_POWER_RESOURCE
select RT8168_GET_MAC_FROM_VPD
select RT8168_SET_LED_MODE
select SOC_INTEL_TWINLAKE
select SYSTEM_TYPE_MINIPC

View file

@ -222,6 +222,20 @@ chip soc/intel/alderlake
device generic 0 on end
end
end
device ref pcie_rp7 on
# Enable PCIE 7 using clk 3
register "pch_pcie_rp[PCH_RP(7)]" = "{
.clk_src = 3,
.clk_req = 3,
.flags = PCIE_RP_LTR | PCIE_RP_AER,
}"
chip drivers/net
register "customized_leds" = "0x05af"
register "wake" = "GPE0_DW2_14" # GPP_F14
register "device_index" = "0"
device pci 00.0 on end
end
end # RTL8111H Ethernet NIC
device ref pcie_rp11 on
# Enable wlan PCIe 11 using clk 2
probe WIFI_TYPE WIFI_PCIE