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tegra124: Fix bloated ROM stage.

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The ROMSTAGE_BASE currently must be aligned to 0x8000 bytes, otherwise linker
will try to do that and pad zeros, creating a large (ex, >40k) romstage blob,
which cannot be loaded properly.

BUG=none
TEST=Boots successfully on Nyan.

Change-Id: I7626542c8344bbf6641a200879e4aa18183dc1bd
Reviewed-on: https://chromium-review.googlesource.com/180150
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Hung-Te Lin <hungte@chromium.org>
Tested-by: Hung-Te Lin <hungte@chromium.org>
This commit is contained in:
Hung-Te Lin 2013-12-14 10:31:54 +08:00 • committed by chrome-internal-fetch
commit 58ee4a7f63
1 changed files with 4 additions and 3 deletions
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7
src/soc/nvidia/tegra124/Kconfig
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@ -37,8 +37,8 @@ config BOOTBLOCK_CPU_INIT
# +4000 (Coreboot) Stack.
# 0x4000_E000 Valid for anything to be executed after BootROM (effective entry
# point address specified in BCT).
# +0000 (Coreboot) Bootblock (max 36k).
# +9000 (Coreboot) ROM stage (max 36k).
# +0000 (Coreboot) Bootblock (max 40k).
# +A000 (Coreboot) ROM stage (max 32k).
# 0x4002_0000 (Coreboot) Cache of CBFS.
# 0x4003_FFFF End of iRAM.
@ -62,9 +62,10 @@ config BOOTBLOCK_BASE
hex
default 0x4000e000
# Note ROMSTAGE_BASE must be aligned to 0x8000.
config ROMSTAGE_BASE
hex
default 0x40017000
default 0x40018000
config RAMSTAGE_BASE
hex