Still not working quite right. Fails badly on 256MB sdram.
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1 changed files with 21 additions and 7 deletions
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@ -40,7 +40,10 @@ it with the version available from LANL.
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* set the right value.
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*/
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#define INIT_MCR $0xf6621000
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#define WRITE_MCR0 movl %ecx, %eax ; outl %eax, %dx
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#define WDELAY movw $0x1000, ax; 1: dec %ax; jnz 1b
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#undef WDELAY
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#define WDELAY outb %al, %dx; jmp 1f; 1: outb %al, %dx
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#define WRITE_MCR0 movl %ecx, %eax ; outl %eax, %dx ; WDELAY
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/*#include <cpu/p5/start32.inc>*/
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.org 0xfe000
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.code16
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@ -142,6 +145,8 @@ code16
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movb $0xfc, %dl
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movl $0xf662f83c, %ecx
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WRITE_MCR0
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// Not only does this not work, it screws up the programming.
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#if 0
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/* check for registered. All this means is write to 0,
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* read back, if it's not the same, set 'registered',
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* read back, it it's the same you're ok.
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@ -156,23 +161,27 @@ code16
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CALLSP(pci_write_dword)
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*/
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nonregistered:
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#endif
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rorl $16, %ecx
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/* clear out the CAS, since we assume start at zero
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* and increment
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*/
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andb $0xf0, %cl
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/* test 8 bit CAS */
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movl $0x800, %esi
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movb $0, (%edi)
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movb $1, 0x800
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movb $1, (%esi) // esi is at 0x800
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cmpb $0,(%edi)
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jnz sizeram
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inc %cl
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roll %esi
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/* change the value we store each time. It makes debugging easier */
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movb $2, 0x1000
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movb $2, (%esi) // esi is at 0x1000
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cmpb $0, (%edi)
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jnz sizeram
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inc %cl
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movb $3, 0x2000
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roll %esi
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movb $3, (%esi) // esi is at 0x2000
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cmpb $0, (%edi)
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jnz sizeram
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inc %cl
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@ -195,6 +204,8 @@ sizeram:
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/* clear the size out to 4 MB */
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andb $0xf8, %cl
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/* 4 MB */
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// esi is at 0x2000 at this point. To get to 0x400000,
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// roll it 13 bits
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movl $0x400000, %esi
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1:
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#ifdef USE_BIG_REAL
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@ -227,10 +238,13 @@ sizeram:
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* Just set 4-bank mode, and set non-zero numbers into a few places.
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* if the byte at 0 changes, you have two banks. Trivial.
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*/
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movl $0x1000, %esi
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movb $0, (%edi)
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movb $5, 0x1000
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movb $6, 0x2000
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movb $7, 0x4000
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movb $5, (%esi)
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roll $1, %esi
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movb $6, (%esi)
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roll $1, %esi
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movb $7, (%esi)
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cmpb $0, (%edi)
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jz 1f /* 4 banks */
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orl $0x80000, %ecx
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