erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

mb/asrock/z87_extreme4: Temporarily refactor nuvoton_pnp_*_conf_state()

Browse source 
As the pair of non-ramstage Nuvoton SIO config mode entry/exit functions
see wider use, they are being moved to sio/nuvoton/common.

This mainboard carries 2 local copies. This preparatory patch moves them
out of smihandler.c and mainboard.c into a temporary C file to prevent
build breakage. It is to be removed when the shared copy is in place.

WARNING: Disassembly of	compiled SMM code shows	a possible stack issue.
Do not flash a binary with this patch applied but without the final
shared version above.

Change-Id: I7a5394478281ac3b92d257e2f0201264b95bb4e5
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90656
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Keith Hui 2025-12-28 19:50:37 -05:00 • committed by Matt DeVillier
commit 0c2a3002d9
4 changed files with 26 additions and 36 deletions
Download patch file Download diff file Expand all files Collapse all files

2
src/mainboard/asrock/z87_extreme4/Makefile.mk
View file

@ -4,3 +4,5 @@ bootblock-y += bootblock.c
bootblock-y += gpio.c
romstage-y += gpio.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
ramstage-y += nuvoton.c
smm-y += nuvoton.c

18
src/mainboard/asrock/z87_extreme4/mainboard.c
View file

@ -10,24 +10,6 @@
#include <southbridge/intel/lynxpoint/pch.h>
#define GPIO1_DEV PNP_DEV(0x2e, NCT6776_WDT1_GPIO01A_V)
#define NUVOTON_ENTRY_KEY 0x87
#define NUVOTON_EXIT_KEY 0xAA
/* Enable configuration: pass entry key '0x87' into index port dev
* two times. */
void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_ENTRY_KEY, port);
outb(NUVOTON_ENTRY_KEY, port);
}
/* Disable configuration: pass exit key '0xAA' into index port dev. */
void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_EXIT_KEY, port);
}
static void turn_off_leds(void *unused)
{

24
src/mainboard/asrock/z87_extreme4/nuvoton.c Normal file
View file

@ -0,0 +1,24 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/pnp_ops.h>
#include <superio/nuvoton/common/nuvoton.h>
#include <superio/nuvoton/nct6776/nct6776.h>
#define NUVOTON_ENTRY_KEY 0x87
#define NUVOTON_EXIT_KEY 0xAA
/* Enable configuration: pass entry key '0x87' into index port dev
* two times. */
void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_ENTRY_KEY, port);
outb(NUVOTON_ENTRY_KEY, port);
}
/* Disable configuration: pass exit key '0xAA' into index port dev. */
void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_EXIT_KEY, port);
}

18
src/mainboard/asrock/z87_extreme4/smihandler.c
View file

@ -7,24 +7,6 @@
#include <superio/nuvoton/nct6776/nct6776.h>
#define GPIO1_DEV PNP_DEV(0x2e, NCT6776_WDT1_GPIO01A_V)
#define NUVOTON_ENTRY_KEY 0x87
#define NUVOTON_EXIT_KEY 0xAA
/* Enable configuration: pass entry key '0x87' into index port dev
* two times. */
void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_ENTRY_KEY, port);
outb(NUVOTON_ENTRY_KEY, port);
}
/* Disable configuration: pass exit key '0xAA' into index port dev. */
void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_EXIT_KEY, port);
}
void mainboard_smi_sleep(u8 slp_typ)
{