soc/intel/pantherlake: Resolve memory corruption by using P2SB2 driver

This commit fixes memory corruption observed during stress
suspend-resume tests on the Fatcat board using Panther Lake U and H
SoCs. The issue stemmed from incorrect routing in the SPCO ACPI method
due to the use of SOC_INTEL_COMMON_BLOCK_IOE_P2SB, which was not
suitable as these SoCs lack an IOE die.

To address this, the commit switches from the IOE driver to the P2SB2
driver, aligning with the appropriate SOC_INTEL_COMMON_BLOCK_P2SB2
selection. The related function calls in the Panther Lake codebase have
been updated to use P2SB2-specific operations.

Panther Lake H and U SoC identifiers have been moved from the IOE driver
to the P2SB2 driver.

BUG=b:422284273
TEST=Memory corruption does not reproduce on the Fatcat board.

Change-Id: If678846b6285aea8cd53b0f7aebe3e75812a9330
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87931
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>

src/soc/intel/common/block/p2sb/ioe_p2sb.c

@@ -37,9 +37,6 @@ struct device_operations device_ops = {
 };
 
 static const unsigned short pci_device_ids[] = {
-	PCI_DID_INTEL_WCL_P2SB2,
-	PCI_DID_INTEL_PTL_H_P2SB2,
-	PCI_DID_INTEL_PTL_U_H_P2SB2,
 	PCI_DID_INTEL_MTL_IOE_M_P2SB,
 	PCI_DID_INTEL_MTL_IOE_P_P2SB,
 	0,

src/soc/intel/pantherlake/Kconfig

@@ -73,11 +73,11 @@ config SOC_INTEL_PANTHERLAKE_BASE
 	select SOC_INTEL_COMMON_BLOCK_HDA
 	select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC
 	select SOC_INTEL_COMMON_BLOCK_IOC
-	select SOC_INTEL_COMMON_BLOCK_IOE_P2SB
 	select SOC_INTEL_COMMON_BLOCK_IPU if SOC_INTEL_PANTHERLAKE
 	select SOC_INTEL_COMMON_BLOCK_IRQ
 	select SOC_INTEL_COMMON_BLOCK_ME_SPEC_21
 	select SOC_INTEL_COMMON_BLOCK_MEMINIT
+	select SOC_INTEL_COMMON_BLOCK_P2SB2
 	select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3
 	select SOC_INTEL_COMMON_BLOCK_PMC_EPOC
 	select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT

src/soc/intel/pantherlake/bootblock/pcd.c

@@ -69,7 +69,7 @@ static void pcd_die_early_ip_init(void)
 	 * controller might want to perform PCR settings.
 	 */
 	p2sb_enable_bar();
-	ioe_p2sb_enable_bar();
+	p2sb2_enable_bar();
 	p2sb_configure_hpet();
 
 	fast_spi_early_init(SPI_BASE_ADDRESS);

src/soc/intel/pantherlake/chip.c

@@ -177,7 +177,7 @@ void soc_init_pre_device(void *chip_info)
 		return;
 	}
 	/* Validate TBT image authentication */
-	config->tbt_authentication = ioe_p2sb_sbi_read(PID_IOM,
+	config->tbt_authentication = p2sb2_sbi_read(PID_IOM,
 					IOM_CSME_IMR_TBT_STATUS) & TBT_VALID_AUTHENTICATION;
 
 	if (CONFIG(SOC_INTEL_COMMON_BLOCK_TRACEHUB))