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mb/amd/crater: Configure UART1 GPIOs

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Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I9b04479d2e1508d767cfc4dc94d2ac55163cc369
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90208
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Anand Vaikar 2025-08-12 16:48:05 +05:30 • committed by Felix Held
commit 520bc70b57
2 changed files with 11 additions and 0 deletions
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5
src/mainboard/amd/crater/early_gpio.c
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@ -47,6 +47,11 @@ static const struct soc_amd_gpio gpio_set_stage_reset[] = {
/*MDIO1_SDA*/
PAD_NF(GPIO_23, MDIO1_SDA, PULL_DOWN),
/* Enable UART 1 */
/* UART1_TXD */
PAD_NF(GPIO_140, UART1_TXD, PULL_NONE),
/* UART1_RXD */
PAD_NF(GPIO_142, UART1_RXD, PULL_NONE),
/* Enable UART 0 */
/* UART0_RXD */

6
src/mainboard/amd/crater/gpio.c
View file

@ -49,6 +49,12 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
/*MDIO1_SDA*/
PAD_NF(GPIO_23, MDIO1_SDA, PULL_DOWN),
/* Enable UART 1 */
/* UART1_TXD */
PAD_NF(GPIO_140, UART1_TXD, PULL_NONE),
/* UART1_RXD */
PAD_NF(GPIO_142, UART1_RXD, PULL_NONE),
/* Enable UART 0 */
/* UART0_RXD */
PAD_NF(GPIO_141, UART0_RXD, PULL_NONE),