soc/intel/cannonlake: Hook up S0ix setting to option API
Hook up the s0ix_enable setting to the option API, so it can be changed at runtime without recompilation. Default to the value set by the mainboard. Change-Id: I1c51e653a9e34bb7f5ac07bcae8481be269f83cf Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87400 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
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1 changed files with 4 additions and 3 deletions
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@ -381,6 +381,10 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
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s_cfg->PchPmSlpS0Vm070VSupport = config->PchPmSlpS0Vm070VSupport;
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s_cfg->PchPmSlpS0Vm075VSupport = config->PchPmSlpS0Vm075VSupport;
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/* S0ix */
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config->s0ix_enable = get_uint_option("s0ix_enable", config->s0ix_enable);
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s_cfg->PchPmSlpS0Enable = config->s0ix_enable;
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/* Lan */
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s_cfg->PchLanEnable = is_devfn_enabled(PCH_DEVFN_GBE);
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if (s_cfg->PchLanEnable) {
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@ -433,9 +437,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
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s_cfg->PchPmPcieWakeFromDeepSx = config->LanWakeFromDeepSx;
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s_cfg->PchPmWolEnableOverride = config->WolEnableOverride;
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/* S0ix */
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s_cfg->PchPmSlpS0Enable = config->s0ix_enable;
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/* disable Legacy PME */
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memset(s_cfg->PcieRpPmSci, 0, sizeof(s_cfg->PcieRpPmSci));
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