From 509b01c3b6af3c4e575606fcd706411ef473e4bf Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 21 Apr 2025 10:34:22 -0500 Subject: [PATCH] soc/intel/cannonlake: Hook up S0ix setting to option API Hook up the s0ix_enable setting to the option API, so it can be changed at runtime without recompilation. Default to the value set by the mainboard. Change-Id: I1c51e653a9e34bb7f5ac07bcae8481be269f83cf Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/87400 Tested-by: build bot (Jenkins) Reviewed-by: Maxim Polyakov --- src/soc/intel/cannonlake/fsp_params.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index f1db0f7d20..55a7c92aa0 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -381,6 +381,10 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) s_cfg->PchPmSlpS0Vm070VSupport = config->PchPmSlpS0Vm070VSupport; s_cfg->PchPmSlpS0Vm075VSupport = config->PchPmSlpS0Vm075VSupport; + /* S0ix */ + config->s0ix_enable = get_uint_option("s0ix_enable", config->s0ix_enable); + s_cfg->PchPmSlpS0Enable = config->s0ix_enable; + /* Lan */ s_cfg->PchLanEnable = is_devfn_enabled(PCH_DEVFN_GBE); if (s_cfg->PchLanEnable) { @@ -433,9 +437,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) s_cfg->PchPmPcieWakeFromDeepSx = config->LanWakeFromDeepSx; s_cfg->PchPmWolEnableOverride = config->WolEnableOverride; - /* S0ix */ - s_cfg->PchPmSlpS0Enable = config->s0ix_enable; - /* disable Legacy PME */ memset(s_cfg->PcieRpPmSci, 0, sizeof(s_cfg->PcieRpPmSci));