erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

soc/intel/pantherlake: Keep image clock configuration enable

Browse source 
The ImguClkOutEn parameters are required in pantherlake, therefore,
avoid disabling the IMGU CLKOUT FSP UPDs.

BUG=b:381044394
TEST=Able to see FSP-M UPDs for google/fatcat where IMGU CLKOUTs are
not disabled with this patch.

Change-Id: Ieb022e6dc0b64106ff30f56cd17f9f219276785f
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85588
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2024-12-13 23:23:48 +05:30
commit 4a0c49e671
1 changed files with 0 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

3
src/soc/intel/pantherlake/romstage/fsp_params.c
View file

@ -115,9 +115,6 @@ static void fill_fspm_uart_params(FSP_M_CONFIG *m_cfg,
static void fill_fspm_ipu_params(FSP_M_CONFIG *m_cfg,
const struct soc_intel_pantherlake_config *config)
{
/* Image clock: disable all clocks for bypassing FSP pin mux */
memset(m_cfg->ImguClkOutEn, 0, sizeof(m_cfg->ImguClkOutEn));
/* IPU */
m_cfg->SaIpuEnable = is_devfn_enabled(PCI_DEVFN_IPU);
}