soc/mediatek/common: Move PMIF SPI macros to per-SoC's header
Different SoCs may require distinct PMIF SPI settings. This commit moves the common PMIF SPI macros to SoC-specific headers to enhance code reusability and maintainability. BUG=b:379008996 BRANCH=none TEST=build pass and driver log is normal Signed-off-by: Zhigang Qin <zhigang.qin@mediatek.corp-partner.google.com> Change-Id: Ifcdf555df4256d7de08b66c3a630a8eb7afb4a35 Reviewed-on: https://review.coreboot.org/c/coreboot/+/87577 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Yidi Lin <yidilin@google.com>
This commit is contained in:
parent
8efdbf0c34
commit
4456c125f6
5 changed files with 44 additions and 12 deletions
|
|
@ -57,14 +57,6 @@ enum {
|
|||
PMIC_AUXADC_RQST0 = PMIC_BASE + 0x1108,
|
||||
};
|
||||
|
||||
#define PMIF_SPI_HW_INF 0x307F
|
||||
#define PMIF_SPI_MD BIT(8)
|
||||
#define PMIF_SPI_AP_SECURE BIT(9)
|
||||
#define PMIF_SPI_AP BIT(10)
|
||||
#define PMIF_SPI_STAUPD BIT(14)
|
||||
#define PMIF_SPI_TSX_HW BIT(19)
|
||||
#define PMIF_SPI_DCXO_HW BIT(20)
|
||||
|
||||
#define DEFAULT_SLVID 0
|
||||
|
||||
#define PMIF_CMD_STA BIT(2)
|
||||
|
|
|
|||
|
|
@ -309,11 +309,9 @@ int pmif_spi_init(struct pmif *arb)
|
|||
write32(&arb->mtk_pmif->timer_ctrl, 0x3);
|
||||
|
||||
/* Enable interfaces and arbitration */
|
||||
write32(&arb->mtk_pmif->inf_en, PMIF_SPI_HW_INF | PMIF_SPI_MD |
|
||||
PMIF_SPI_AP_SECURE | PMIF_SPI_AP);
|
||||
write32(&arb->mtk_pmif->inf_en, PMIF_SPI_INF_EN);
|
||||
|
||||
write32(&arb->mtk_pmif->arb_en, PMIF_SPI_HW_INF | PMIF_SPI_MD | PMIF_SPI_AP_SECURE |
|
||||
PMIF_SPI_AP | PMIF_SPI_STAUPD | PMIF_SPI_TSX_HW | PMIF_SPI_DCXO_HW);
|
||||
write32(&arb->mtk_pmif->arb_en, PMIF_SPI_ARB_EN);
|
||||
|
||||
/* Enable GPS AUXADC HW 0 and 1 */
|
||||
SET32_BITFIELDS(&arb->mtk_pmif->other_inf_en, INTGPSADCINF_EN, 0x3);
|
||||
|
|
|
|||
|
|
@ -124,6 +124,20 @@ check_member(mtk_pmif_regs, pmic_eint_sta_addr, 0x414);
|
|||
check_member(mtk_pmif_regs, irq_event_en_0, 0x420);
|
||||
check_member(mtk_pmif_regs, swinf_0_acc, 0x800);
|
||||
|
||||
#define PMIF_SPI_HW_INF 0x307F
|
||||
#define PMIF_SPI_MD BIT(8)
|
||||
#define PMIF_SPI_AP_SECURE BIT(9)
|
||||
#define PMIF_SPI_AP BIT(10)
|
||||
#define PMIF_SPI_STAUPD BIT(14)
|
||||
#define PMIF_SPI_TSX_HW BIT(19)
|
||||
#define PMIF_SPI_DCXO_HW BIT(20)
|
||||
|
||||
#define PMIF_SPI_INF_EN (PMIF_SPI_HW_INF | PMIF_SPI_MD | PMIF_SPI_AP_SECURE | \
|
||||
PMIF_SPI_AP)
|
||||
#define PMIF_SPI_ARB_EN (PMIF_SPI_HW_INF | PMIF_SPI_MD | PMIF_SPI_AP_SECURE | \
|
||||
PMIF_SPI_AP | PMIF_SPI_STAUPD | PMIF_SPI_TSX_HW | \
|
||||
PMIF_SPI_DCXO_HW)
|
||||
|
||||
#define PMIF_SPMI_AP_CHAN (PMIF_SPMI_BASE + 0x880)
|
||||
#define PMIF_SPI_AP_CHAN (PMIF_SPI_BASE + 0x880)
|
||||
|
||||
|
|
|
|||
|
|
@ -123,6 +123,20 @@ check_member(mtk_pmif_regs, pmic_eint_sta_addr, 0x40C);
|
|||
check_member(mtk_pmif_regs, irq_event_en_0, 0x418);
|
||||
check_member(mtk_pmif_regs, swinf_0_acc, 0xC00);
|
||||
|
||||
#define PMIF_SPI_HW_INF 0x307F
|
||||
#define PMIF_SPI_MD BIT(8)
|
||||
#define PMIF_SPI_AP_SECURE BIT(9)
|
||||
#define PMIF_SPI_AP BIT(10)
|
||||
#define PMIF_SPI_STAUPD BIT(14)
|
||||
#define PMIF_SPI_TSX_HW BIT(19)
|
||||
#define PMIF_SPI_DCXO_HW BIT(20)
|
||||
|
||||
#define PMIF_SPI_INF_EN (PMIF_SPI_HW_INF | PMIF_SPI_MD | PMIF_SPI_AP_SECURE | \
|
||||
PMIF_SPI_AP)
|
||||
#define PMIF_SPI_ARB_EN (PMIF_SPI_HW_INF | PMIF_SPI_MD | PMIF_SPI_AP_SECURE | \
|
||||
PMIF_SPI_AP | PMIF_SPI_STAUPD | PMIF_SPI_TSX_HW | \
|
||||
PMIF_SPI_DCXO_HW)
|
||||
|
||||
#define PMIF_SPMI_AP_CHAN (PMIF_SPMI_BASE + 0xC80)
|
||||
#define PMIF_SPI_AP_CHAN (PMIF_SPI_BASE + 0xC80)
|
||||
|
||||
|
|
|
|||
|
|
@ -124,6 +124,20 @@ check_member(mtk_pmif_regs, pmic_eint_sta_addr, 0x414);
|
|||
check_member(mtk_pmif_regs, irq_event_en_0, 0x420);
|
||||
check_member(mtk_pmif_regs, swinf_0_acc, 0x800);
|
||||
|
||||
#define PMIF_SPI_HW_INF 0x307F
|
||||
#define PMIF_SPI_MD BIT(8)
|
||||
#define PMIF_SPI_AP_SECURE BIT(9)
|
||||
#define PMIF_SPI_AP BIT(10)
|
||||
#define PMIF_SPI_STAUPD BIT(14)
|
||||
#define PMIF_SPI_TSX_HW BIT(19)
|
||||
#define PMIF_SPI_DCXO_HW BIT(20)
|
||||
|
||||
#define PMIF_SPI_INF_EN (PMIF_SPI_HW_INF | PMIF_SPI_MD | PMIF_SPI_AP_SECURE | \
|
||||
PMIF_SPI_AP)
|
||||
#define PMIF_SPI_ARB_EN (PMIF_SPI_HW_INF | PMIF_SPI_MD | PMIF_SPI_AP_SECURE | \
|
||||
PMIF_SPI_AP | PMIF_SPI_STAUPD | PMIF_SPI_TSX_HW | \
|
||||
PMIF_SPI_DCXO_HW)
|
||||
|
||||
#define PMIF_SPMI_AP_CHAN (PMIF_SPMI_BASE + 0x880)
|
||||
#define PMIF_SPI_AP_CHAN (PMIF_SPI_BASE + 0x880)
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue