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mb/amd/crater: Add touchscreen support

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Add edp I2C touch panel suport.

Change-Id: I33f13fc4c76dfe7cb9abf114d31e83e7ad24bdb9
Signed-off-by: Ana Carolina Cabral <ana.cpmelo95@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87219
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Ana Carolina Cabral 2025-04-14 10:32:37 -03:00 • committed by Matt DeVillier
commit 443f514365
3 changed files with 34 additions and 1 deletions
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1
src/mainboard/amd/crater/Kconfig
View file

@ -6,6 +6,7 @@ config BOARD_AMD_CRATER_COMMON
select EC_ACPI
select SOC_AMD_COMMON_BLOCK_USE_ESPI if !SOC_AMD_COMMON_BLOCK_SIMNOW_BUILD
select DRIVERS_PCIE_RTD3_DEVICE
select DRIVERS_I2C_HID
select MAINBOARD_HAS_CHROMEOS
select HAVE_ACPI_RESUME
select PCIEXP_ASPM

16
src/mainboard/amd/crater/devicetree_renoir.cb
View file

@ -131,7 +131,21 @@ chip soc/amd/cezanne
end
device ref i2c_0 on end
device ref i2c_1 on end
device ref i2c_1 on # eDP Touch Panel
chip drivers/i2c/hid
register "generic.hid" = ""PNP0C50""
register "generic.desc" = ""ELAN Touchscreen""
register "generic.detect" = "1"
register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_4)"
register "generic.enable_delay_ms" = "1"
register "generic.reset_delay_ms" = "20"
register "generic.reset_off_delay_ms" = "2"
register "generic.stop_off_delay_ms" = "2"
register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 9 on end
end
end
device ref i2c_2 on end
device ref i2c_3 on end
device ref uart_0 on end # UART0

18
src/mainboard/amd/crater/ec.c
View file

@ -63,6 +63,10 @@
#define ECA_SMBUS1_EN BIT(1)
#define ECA_SMBUS0_EN BIT(0)
#define EC_GPIO_B_ADDR 0xAB
#define ECB_TPNL_EN BIT(2)
#define ECB_TPNL_PWR_EN BIT(0)
#define EC_GPIO_C_ADDR 0xAC
#define ECC_TPNL_BUF_EN BIT(6)
#define ECC_TPAD_BUF_EN BIT(5)
@ -141,6 +145,20 @@ static void configure_ec_gpio(void)
}
printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_8_ADDR, tmp);
ec_write(EC_GPIO_8_ADDR, tmp);
/* eDP Touch panel */
if(CONFIG(ENABLE_EDP)) {
tmp = ec_read(EC_GPIO_9_ADDR);
tmp &= ~(EC9_MUX0_S1);
tmp |= EC9_MUX0_S0;
printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_9_ADDR, tmp);
ec_write(EC_GPIO_9_ADDR, tmp);
tmp = ec_read(EC_GPIO_B_ADDR);
tmp |= ECB_TPNL_EN | ECB_TPNL_EN;
printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_B_ADDR, tmp);
ec_write(EC_GPIO_B_ADDR, tmp);
}
}
static const struct soc_amd_gpio RevA_gpio_set_stage_ram[] = {