broadwell: Add parameters to pei_data structure

- disable_self_refresh: parameter to disable memory self refresh
during training.  This can be used to work around power issues
seen with lpddr3.
- disable_saved_data: parameter to disable the use of the cached
MRC data.  This can be used to work around lpddr3 training replay
issues.

BUG=chrome-os-partner:29787,chrome-os-partner:29117
BRANCH=None
CQ-DEPEND=CL:*169275
TEST=build and boot on samus

Change-Id: I051bfbfa0d171ad9b2503cb9a30990b13b4c0cb2
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/208153
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie 2014-07-15 13:39:05 -07:00 committed by chrome-internal-fetch
commit 423fbf67e4
2 changed files with 16 additions and 1 deletions

View file

@ -31,7 +31,7 @@
#include <types.h>
#define PEI_VERSION 20
#define PEI_VERSION 21
#define ABI_X86 __attribute__((regparm(0)))
@ -122,6 +122,8 @@ struct pei_data
int dq_pins_interleaved;
/* Limit DDR3 frequency */
int max_ddr3_freq;
/* Disable self refresh */
int disable_self_refresh;
/* USB port configuration */
struct usb2_port_setting usb2_ports[MAX_USB2_PORTS];
@ -167,6 +169,9 @@ struct pei_data
const void *saved_data;
int saved_data_size;
/* Disable use of saved data (can be set by mainboard) */
int disable_saved_data;
/* Data from MRC that should be saved to flash */
void *data_to_save;
int data_to_save_size;

View file

@ -74,6 +74,16 @@ void raminit(struct pei_data *pei_data)
#endif
}
/*
* Do not use saved pei data. Can be set by mainboard romstage
* to force a full train of memory on every boot.
*/
if (pei_data->disable_saved_data) {
printk(BIOS_DEBUG, "Disabling PEI saved data by request\n");
pei_data->saved_data = NULL;
pei_data->saved_data_size = 0;
}
/* Determine if mrc.bin is in the cbfs. */
entry = (pei_wrapper_entry_t)cbfs_get_file_content(
CBFS_DEFAULT_MEDIA, "mrc.bin", 0xab);