diff --git a/src/soc/intel/broadwell/broadwell/pei_data.h b/src/soc/intel/broadwell/broadwell/pei_data.h
index f8e63069b3..07b04d24d4 100644
--- a/src/soc/intel/broadwell/broadwell/pei_data.h
+++ b/src/soc/intel/broadwell/broadwell/pei_data.h
@@ -31,7 +31,7 @@
 
 #include <types.h>
 
-#define PEI_VERSION 20
+#define PEI_VERSION 21
 
 #define ABI_X86 __attribute__((regparm(0)))
 
@@ -122,6 +122,8 @@ struct pei_data
 	int dq_pins_interleaved;
 	/* Limit DDR3 frequency */
 	int max_ddr3_freq;
+	/* Disable self refresh */
+	int disable_self_refresh;
 
 	/* USB port configuration */
 	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS];
@@ -167,6 +169,9 @@ struct pei_data
 	const void *saved_data;
 	int saved_data_size;
 
+	/* Disable use of saved data (can be set by mainboard) */
+	int disable_saved_data;
+
 	/* Data from MRC that should be saved to flash */
 	void *data_to_save;
 	int data_to_save_size;
diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c
index a11efc8f8d..a5f688ea69 100644
--- a/src/soc/intel/broadwell/romstage/raminit.c
+++ b/src/soc/intel/broadwell/romstage/raminit.c
@@ -74,6 +74,16 @@ void raminit(struct pei_data *pei_data)
 #endif
 	}
 
+	/*
+	 * Do not use saved pei data.  Can be set by mainboard romstage
+	 * to force a full train of memory on every boot.
+	 */
+	if (pei_data->disable_saved_data) {
+		printk(BIOS_DEBUG, "Disabling PEI saved data by request\n");
+		pei_data->saved_data = NULL;
+		pei_data->saved_data_size = 0;
+	}
+
 	/* Determine if mrc.bin is in the cbfs. */
 	entry = (pei_wrapper_entry_t)cbfs_get_file_content(
 		CBFS_DEFAULT_MEDIA, "mrc.bin", 0xab);