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sb/intel/lynxpoint: Allow ME enable/disable via option

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Add an option variable 'me_disable' to control the visibility of the
HECI PCI device at runtime. Default to the Kconfig selection if not set.

Change-Id: I12c4c9f062cb5904c2f9c05b333bf0ed81aba632
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87384
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Matt DeVillier 2025-04-20 16:02:43 -05:00
commit 42379e7f76
1 changed files with 3 additions and 2 deletions
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5
src/southbridge/intel/lynxpoint/me.c
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@ -18,6 +18,7 @@
#include <string.h>
#include <delay.h>
#include <elog.h>
#include <option.h>
#include <stdlib.h>
#include "chip.h"
@ -542,7 +543,7 @@ void intel_me_finalize(struct device *dev)
/* Try to send EOP command so ME stops accepting other commands */
mkhi_end_of_post();
if (!CONFIG(DISABLE_ME_PCI))
if (!get_uint_option("me_disable", CONFIG(DISABLE_ME_PCI)))
return;
/* Make sure IO is disabled */
@ -905,7 +906,7 @@ static void intel_me_init(struct device *dev)
static void intel_me_enable(struct device *dev)
{
/* Avoid talking to the device in S3 path */
if (acpi_is_wakeup_s3() && CONFIG(DISABLE_ME_PCI)) {
if (acpi_is_wakeup_s3() && get_uint_option("me_disable", CONFIG(DISABLE_ME_PCI))) {
dev->enabled = 0;
pch_disable_devfn(dev);
}