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soc/mediatek/mt8189: Add support for USB port 0 reset

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USB port 0 (P0) is force_suspended during the BootROM stage, and this
state won't be cleared in subsequent stages, causing P0 to become
unusable. Adding the P0 controller in coreboot ensures that the
force_suspended state is cleared, restoring P0 functionality. This
action requires setting the necessary register addresses, which is
handled by setup_usb_secondary_host().

BUG=b:417079837
BRANCH=None
TEST=Build passes and insert a USB device into USB port 0 can enumerate
     the USB device.

Signed-off-by: Liu Liu <ot_liu.liu@mediatek.corp-partner.google.com>
Change-Id: I98534a833b344156a0e76e76ad7be88f98b2a967
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87977
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
This commit is contained in:
Liu Liu 2025-06-05 17:14:41 +08:00 • committed by Yu-Ping Wu
commit 40bf6c28f8
2 changed files with 3 additions and 1 deletions
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2
src/soc/mediatek/mt8189/Makefile.mk
View file

@ -52,7 +52,7 @@ ramstage-y += ../common/rtc.c ../common/rtc_mt6359p.c ../common/rtc_osc_init.c
ramstage-y += soc.c
ramstage-y += ../common/spm.c ../common/spm_v2.c spm.c
ramstage-y += ../common/sspm.c ../common/sspm_sram.c
ramstage-y += ../common/usb.c usb.c
ramstage-y += ../common/usb.c ../common/usb_secondary.c usb.c
BL31_MAKEARGS += PLAT=mt8189

2
src/soc/mediatek/mt8189/include/soc/addressmap.h
View file

@ -59,6 +59,7 @@ enum {
PERICFG_AO_BASE = IO_PHYS + 0x01036000,
DEVAPC_PERI_PAR_AO_BASE = IO_PHYS + 0x0103C000,
AUDIO_BASE = IO_PHYS + 0x01050000,
SSUSB_IPPC_BASE_P0 = IO_PHYS + 0x01203E00,
MSDC0_BASE = IO_PHYS + 0x01230000,
SSUSB_IPPC_BASE = IO_PHYS + 0x01263E00,
UFSHCI_BASE = IO_PHYS + 0x012B0000,
@ -85,6 +86,7 @@ enum {
I2C4_BASE = IO_PHYS + 0x01D71000,
I2C5_BASE = IO_PHYS + 0x01D72000,
I2C6_BASE = IO_PHYS + 0x01D73000,
SSUSB_SIF_BASE_P0 = IO_PHYS + 0x01E80300,
I2C7_BASE = IO_PHYS + 0x01F30000,
I2C8_BASE = IO_PHYS + 0x01F31000,
IMP_IIC_WRAP_E_BASE = IO_PHYS + 0x01C22000,