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soc/intel/pantherlake: Correct Touch Controller Speed Configuration

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The touch controller's I2C bus speed configuration was previously set
directly through register values. This update introduces the use of the
I2C speed enum type to specify the desired connection speed, improving
clarity and reducing the risk of errors. A mapping function has been
added to convert the I2C speed enum into the appropriate register
value, factoring in the SoC's specific divider configuration. This
change ensures that the speed assignment aligns with the expected
operational parameters of the Panther Lake SoC touch controller.

BUG=none
TEST=Boot Fatcat board to OS and verify that the I2C speed assignments
are correct for the register value in SSDT.

Signed-off-by: Cliff Huang <cliff.huang@intel.com>
Change-Id: I32e71ddcab77af2119c012bd3276f83c1bcea954
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89396
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
This commit is contained in:
Cliff Huang 2025-10-01 11:09:29 -07:00 • committed by Nick Vaccaro
commit 3dee4cd0c0
2 changed files with 24 additions and 4 deletions
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6
src/soc/intel/pantherlake/include/soc/touch.h
View file

@ -3,6 +3,8 @@
#ifndef _SOC_PANTHERLAKE_TOUCH_H_
#define _SOC_PANTHERLAKE_TOUCH_H_
#include <commonlib/bsd/helpers.h>
/* For THC-I2C: */
/*
@ -54,8 +56,8 @@
/* unit: ms */
#define SOC_PTL_THC_RST_SEQ_DLY 300
/* The initial default speed is 17000000 Hz. */
#define SOC_PTL_THC_CONNECTION_SPEED 17000000
/* The initial default speed is 17 MHz. */
#define SOC_PTL_THC_SPI_CONNECTION_SPEED (17 * MHz)
/* 0 = no limit */
#define SOC_PTL_THC_HIDSPI_LIMIT_PKT_SZ 0

22
src/soc/intel/pantherlake/touch.c
View file

@ -3,11 +3,29 @@
#include <drivers/intel/touch/chip.h>
#include <soc/touch.h>
/* Convert I2C speed into value for the register in SoC */
static uint64_t get_soc_thc_i2c_bus_freq_val(uint32_t speed)
{
switch (speed) {
case I2C_SPEED_FAST_PLUS:
return SOC_PTL_THC_I2C_CONNECTION_SPEED_FMP;
case I2C_SPEED_FAST:
return SOC_PTL_THC_I2C_CONNECTION_SPEED_FM;
case I2C_SPEED_STANDARD:
return SOC_PTL_THC_I2C_CONNECTION_SPEED_SM;
case 0: /* If not specified in the device tree, SoC, and device, standard speed is used */
return SOC_PTL_THC_I2C_CONNECTION_SPEED_SM;
default:
die("Fail to map %d Hz to proper I2C speed.\n", speed);
}
}
/* SoC-specific THC-I2C config */
const struct intel_thc_hidi2c_info *soc_get_thc_hidi2c_info(void)
{
static const struct intel_thc_hidi2c_info soc_thc_hidi2c_info = {
.connection_speed = SOC_PTL_THC_I2C_CONNECTION_SPEED_FM,
.connection_speed = I2C_SPEED_FAST, /* 400KHz */
.get_soc_i2c_bus_speed_val_func = get_soc_thc_i2c_bus_freq_val,
.addr_mode = SOC_PTL_THC_I2C_ADDR_MODE,
.sm_scl_high_period = SOC_PTL_THC_I2C_SM_SCL_HIGH_PERIOD,
.sm_scl_low_period = SOC_PTL_THC_I2C_SM_SCL_LOW_PERIOD,
@ -35,7 +53,7 @@ const struct intel_thc_hidi2c_info *soc_get_thc_hidi2c_info(void)
const struct intel_thc_hidspi_info *soc_get_thc_hidspi_info(void)
{
static const struct intel_thc_hidspi_info soc_thc_hidspi_info = {
.connection_speed = SOC_PTL_THC_CONNECTION_SPEED,
.connection_speed = SOC_PTL_THC_SPI_CONNECTION_SPEED,
.write_mode = HIDSPI_WRITE_MODE_MULTI_SINGLE_SPI,
.limit_packet_size = SOC_PTL_THC_HIDSPI_LIMIT_PKT_SZ,
.performance_limit = SOC_PTL_THC_PERFORMANCE_LIMIT,