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mb/google/trulo/var/kaladin: Enable External bypass config2 settings

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Enable External bypass config2 for kaladin and keep FIVR settings for kelsier, and set vccin_aux_imon_iccmax to PD_TIER_VOLUME based on intel
team suggestion.

BUG=b:445829422
TEST=build and flash to DUT, check suspend_stress_test -c 1 pass

Cq-Depend:chrome-internal:8601618
Change-Id: I79e4f61c4bef9b628756a882c8d8dc0a9cb2238c
Signed-off-by: Eren Peng <peng.eren@inventec.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89276
Reviewed-by: Doris <doris.hsu@intel.com>
Reviewed-by: Derek Huang <derekhuang@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Eren Peng 2025-09-20 13:52:26 +08:00 • committed by Subrata Banik
commit 3b34079b19
2 changed files with 25 additions and 0 deletions
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23
src/mainboard/google/brya/variants/kaladin/fw_config.c
View file

@ -1,9 +1,32 @@
#include <boardid.h>
#include <fw_config.h>
#include <baseboard/variants.h>
void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
{
uint32_t board_version = board_id();
if (fw_config_probe(FW_CONFIG(MB_USB, MB_USB_2C_1A))) {
config->tcss_ports[1] = (struct tcss_port_config) TCSS_PORT_DEFAULT(OC_SKIP);
}
if (fw_config_probe(FW_CONFIG(TABLET_MODE, TABLET_MODE_PRESENT)) && board_version >= 2) {
/* # Configure external V1P05/Vnn/VnnSx Rails */
config->ext_fivr_settings.configure_ext_fivr = 1;
config->ext_fivr_settings.v1p05_enable_bitmap =
FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0;
config->ext_fivr_settings.vnn_enable_bitmap =
FIVR_ENABLE_ALL_SX;
config->ext_fivr_settings.vnn_sx_enable_bitmap =
FIVR_ENABLE_ALL_SX;
config->ext_fivr_settings.v1p05_supported_voltage_bitmap =
FIVR_VOLTAGE_NORMAL;
config->ext_fivr_settings.vnn_supported_voltage_bitmap =
FIVR_VOLTAGE_MIN_ACTIVE;
config->ext_fivr_settings.v1p05_voltage_mv = 1050;
config->ext_fivr_settings.vnn_voltage_mv = 780;
config->ext_fivr_settings.vnn_sx_voltage_mv = 1050;
config->ext_fivr_settings.v1p05_icc_max_ma = 500;
config->ext_fivr_settings.vnn_icc_max_ma = 500;
printk(BIOS_INFO, "Configured External FIVR\n");
}
}

2
src/mainboard/google/brya/variants/kaladin/overridetree.cb
View file

@ -171,6 +171,8 @@ chip soc/intel/alderlake
register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"
register "pch_hda_idisp_codec_enable" = "1"
register "vccin_aux_imon_iccmax" = "PD_TIER_VOLUME" # 27A
# Enable CNVi BT Audio offload
register "cnvi_bt_audio_offload" = "1"