diff --git a/src/mainboard/google/brya/variants/kaladin/fw_config.c b/src/mainboard/google/brya/variants/kaladin/fw_config.c
index 6db352e3e9..7e15571ad4 100644
--- a/src/mainboard/google/brya/variants/kaladin/fw_config.c
+++ b/src/mainboard/google/brya/variants/kaladin/fw_config.c
@@ -1,9 +1,32 @@
+#include <boardid.h>
 #include <fw_config.h>
 #include <baseboard/variants.h>
 
 void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
 {
+	uint32_t board_version = board_id();
+
 	if (fw_config_probe(FW_CONFIG(MB_USB, MB_USB_2C_1A))) {
 		config->tcss_ports[1] = (struct tcss_port_config) TCSS_PORT_DEFAULT(OC_SKIP);
 	}
+	if (fw_config_probe(FW_CONFIG(TABLET_MODE, TABLET_MODE_PRESENT)) && board_version >= 2) {
+		/* # Configure external V1P05/Vnn/VnnSx Rails */
+		config->ext_fivr_settings.configure_ext_fivr = 1;
+		config->ext_fivr_settings.v1p05_enable_bitmap =
+				FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0;
+		config->ext_fivr_settings.vnn_enable_bitmap =
+				FIVR_ENABLE_ALL_SX;
+		config->ext_fivr_settings.vnn_sx_enable_bitmap =
+				FIVR_ENABLE_ALL_SX;
+		config->ext_fivr_settings.v1p05_supported_voltage_bitmap =
+				FIVR_VOLTAGE_NORMAL;
+		config->ext_fivr_settings.vnn_supported_voltage_bitmap =
+				FIVR_VOLTAGE_MIN_ACTIVE;
+		config->ext_fivr_settings.v1p05_voltage_mv = 1050;
+		config->ext_fivr_settings.vnn_voltage_mv = 780;
+		config->ext_fivr_settings.vnn_sx_voltage_mv = 1050;
+		config->ext_fivr_settings.v1p05_icc_max_ma = 500;
+		config->ext_fivr_settings.vnn_icc_max_ma = 500;
+		printk(BIOS_INFO, "Configured External FIVR\n");
+	}
 }
diff --git a/src/mainboard/google/brya/variants/kaladin/overridetree.cb b/src/mainboard/google/brya/variants/kaladin/overridetree.cb
index 85867c9fd7..a31ed720c5 100644
--- a/src/mainboard/google/brya/variants/kaladin/overridetree.cb
+++ b/src/mainboard/google/brya/variants/kaladin/overridetree.cb
@@ -171,6 +171,8 @@ chip soc/intel/alderlake
 	register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"
 	register "pch_hda_idisp_codec_enable" = "1"
 
+	register "vccin_aux_imon_iccmax" = "PD_TIER_VOLUME" # 27A
+
 	# Enable CNVi BT Audio offload
 	register "cnvi_bt_audio_offload" = "1"