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mb/starlabs/*: Unify tcc_offset settings

Browse source 
Add a simply macro to make the value set for tcc_offset easier to
read.

Then, unify the settings across all boards:
* 70, 80 and 90 degrees for fanless boards
* 80, 90 and 100 degrees for fanned boards

Change-Id: I5c0323aea0d9d3b09e60f88c3a95c821ab1d3b7d
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86740
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes 2025-03-05 15:20:35 +00:00
commit 3a8835f0e8
10 changed files with 60 additions and 30 deletions
Download patch file Download diff file Expand all files Collapse all files

9
src/mainboard/starlabs/byte_adl/variants/mk_ii/devtree.c
View file

@ -9,6 +9,9 @@
#include <types.h>
#include <variants.h>
#define TJ_MAX 105
#define TCC(temp) (TJ_MAX - temp)
void devtree_update(void)
{
config_t *cfg = config_of_soc();
@ -31,15 +34,15 @@ void devtree_update(void)
switch (get_power_profile(PP_POWER_SAVER)) {
case PP_POWER_SAVER:
performance_scale -= 50;
cfg->tcc_offset = 30;
cfg->tcc_offset = TCC(70);
break;
case PP_BALANCED:
performance_scale -= 25;
cfg->tcc_offset = 25;
cfg->tcc_offset = TCC(80);
break;
case PP_PERFORMANCE:
/* Use the Intel defaults */
cfg->tcc_offset = 20;
cfg->tcc_offset = TCC(90);
break;
}

9
src/mainboard/starlabs/starbook/variants/adl/devtree.c
View file

@ -9,6 +9,9 @@
#include <types.h>
#include <variants.h>
#define TJ_MAX 110
#define TCC(temp) (TJ_MAX - temp)
void devtree_update(void)
{
config_t *cfg = config_of_soc();
@ -35,15 +38,15 @@ void devtree_update(void)
switch (get_power_profile(PP_POWER_SAVER)) {
case PP_POWER_SAVER:
performance_scale -= 50;
cfg->tcc_offset = 20;
cfg->tcc_offset = TCC(80);
break;
case PP_BALANCED:
performance_scale -= 25;
cfg->tcc_offset = 15;
cfg->tcc_offset = TCC(90);
break;
case PP_PERFORMANCE:
/* Use the Intel defaults */
cfg->tcc_offset = 10;
cfg->tcc_offset = TCC(100);
break;
}

9
src/mainboard/starlabs/starbook/variants/adl_n/devtree.c
View file

@ -9,6 +9,9 @@
#include <types.h>
#include <variants.h>
#define TJ_MAX 105
#define TCC(temp) (TJ_MAX - temp)
void devtree_update(void)
{
config_t *cfg = config_of_soc();
@ -30,15 +33,15 @@ void devtree_update(void)
switch (get_power_profile(PP_POWER_SAVER)) {
case PP_POWER_SAVER:
performance_scale -= 50;
cfg->tcc_offset = 20;
cfg->tcc_offset = TCC(70);
break;
case PP_BALANCED:
performance_scale -= 25;
cfg->tcc_offset = 15;
cfg->tcc_offset = TCC(80);
break;
case PP_PERFORMANCE:
/* Use the Intel defaults */
cfg->tcc_offset = 10;
cfg->tcc_offset = TCC(90);
break;
}

9
src/mainboard/starlabs/starbook/variants/cml/devtree.c
View file

@ -9,6 +9,9 @@
#include <types.h>
#include <variants.h>
#define TJ_MAX 100
#define TCC(temp) (TJ_MAX - temp)
void devtree_update(void)
{
config_t *cfg = config_of_soc();
@ -29,15 +32,15 @@ void devtree_update(void)
switch (get_power_profile(PP_POWER_SAVER)) {
case PP_POWER_SAVER:
performance_scale -= 50;
cfg->tcc_offset = 20;
cfg->tcc_offset = TCC(80);
break;
case PP_BALANCED:
performance_scale -= 25;
cfg->tcc_offset = 15;
cfg->tcc_offset = TCC(90);
break;
case PP_PERFORMANCE:
/* Use the Intel defaults */
cfg->tcc_offset = 10;
cfg->tcc_offset = TCC(100);
break;
}

9
src/mainboard/starlabs/starbook/variants/kbl/devtree.c
View file

@ -9,6 +9,9 @@
#include <types.h>
#include <variants.h>
#define TJ_MAX 100
#define TCC(temp) (TJ_MAX - temp)
void devtree_update(void)
{
config_t *cfg = config_of_soc();
@ -29,15 +32,15 @@ void devtree_update(void)
switch (get_power_profile(PP_POWER_SAVER)) {
case PP_POWER_SAVER:
performance_scale -= 50;
cfg->tcc_offset = 20;
cfg->tcc_offset = TCC(80);
break;
case PP_BALANCED:
performance_scale -= 25;
cfg->tcc_offset = 15;
cfg->tcc_offset = TCC(90);
break;
case PP_PERFORMANCE:
/* Use the Intel defaults */
cfg->tcc_offset = 10;
cfg->tcc_offset = TCC(100);
break;
}

9
src/mainboard/starlabs/starbook/variants/mtl/devtree.c
View file

@ -9,6 +9,9 @@
#include <types.h>
#include <variants.h>
#define TJ_MAX 110
#define TCC(temp) (TJ_MAX - temp)
void devtree_update(void)
{
config_t *cfg = config_of_soc();
@ -30,15 +33,15 @@ void devtree_update(void)
switch (get_power_profile(PP_POWER_SAVER)) {
case PP_POWER_SAVER:
performance_scale -= 50;
cfg->tcc_offset = 30;
cfg->tcc_offset = TCC(80);
break;
case PP_BALANCED:
performance_scale -= 25;
cfg->tcc_offset = 25;
cfg->tcc_offset = TCC(90);
break;
case PP_PERFORMANCE:
/* Use the Intel defaults */
cfg->tcc_offset = 20;
cfg->tcc_offset = TCC(100);
break;
}

9
src/mainboard/starlabs/starbook/variants/rpl/devtree.c
View file

@ -9,6 +9,9 @@
#include <types.h>
#include <variants.h>
#define TJ_MAX 110
#define TCC(temp) (TJ_MAX - temp)
void devtree_update(void)
{
config_t *cfg = config_of_soc();
@ -37,15 +40,15 @@ void devtree_update(void)
switch (get_power_profile(PP_POWER_SAVER)) {
case PP_POWER_SAVER:
performance_scale -= 50;
cfg->tcc_offset = 30;
cfg->tcc_offset = TCC(80);
break;
case PP_BALANCED:
performance_scale -= 25;
cfg->tcc_offset = 25;
cfg->tcc_offset = TCC(90);
break;
case PP_PERFORMANCE:
/* Use the Intel defaults */
cfg->tcc_offset = 20;
cfg->tcc_offset = TCC(100);
break;
}

9
src/mainboard/starlabs/starbook/variants/tgl/devtree.c
View file

@ -9,6 +9,9 @@
#include <types.h>
#include <variants.h>
#define TJ_MAX 100
#define TCC(temp) (TJ_MAX - temp)
void devtree_update(void)
{
config_t *cfg = config_of_soc();
@ -38,15 +41,15 @@ void devtree_update(void)
switch (get_power_profile(PP_POWER_SAVER)) {
case PP_POWER_SAVER:
performance_scale -= 50;
cfg->tcc_offset = 30;
cfg->tcc_offset = TCC(80);
break;
case PP_BALANCED:
performance_scale -= 25;
cfg->tcc_offset = 25;
cfg->tcc_offset = TCC(90);
break;
case PP_PERFORMANCE:
/* Use the Intel defaults */
cfg->tcc_offset = 20;
cfg->tcc_offset = TCC(100);
break;
}

9
src/mainboard/starlabs/starfighter/variants/rpl/devtree.c
View file

@ -9,6 +9,9 @@
#include <types.h>
#include <variants.h>
#define TJ_MAX 110
#define TCC(temp) (TJ_MAX - temp)
void devtree_update(void)
{
config_t *cfg = config_of_soc();
@ -38,15 +41,15 @@ void devtree_update(void)
switch (get_power_profile(PP_POWER_SAVER)) {
case PP_POWER_SAVER:
performance_scale -= 50;
cfg->tcc_offset = 30;
cfg->tcc_offset = TCC(80);
break;
case PP_BALANCED:
performance_scale -= 25;
cfg->tcc_offset = 25;
cfg->tcc_offset = TCC(90);
break;
case PP_PERFORMANCE:
/* Use the Intel defaults */
cfg->tcc_offset = 20;
cfg->tcc_offset = TCC(100);
break;
}

9
src/mainboard/starlabs/starlite_adl/variants/mk_v/devtree.c
View file

@ -9,6 +9,9 @@
#include <types.h>
#include <variants.h>
#define TJ_MAX 105
#define TCC(temp) (TJ_MAX - temp)
void devtree_update(void)
{
config_t *cfg = config_of_soc();
@ -33,15 +36,15 @@ void devtree_update(void)
switch (get_power_profile(PP_POWER_SAVER)) {
case PP_POWER_SAVER:
performance_scale -= 50;
cfg->tcc_offset = 30;
cfg->tcc_offset = TCC(70);
break;
case PP_BALANCED:
performance_scale -= 25;
cfg->tcc_offset = 25;
cfg->tcc_offset = TCC(80);
break;
case PP_PERFORMANCE:
/* Use the Intel defaults */
cfg->tcc_offset = 20;
cfg->tcc_offset = TCC(90);
break;
}