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soc/intel/pantherlake: Bind SoC config to LowerBasicMemTestSize UPD

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The lower_basic_mem_test_size SoC setting (LowerBasicMemTestSize UPD)
request FSP-M to reduce the size of memory tested after memory
training. This option reduces the boot time. This is considered a safe
option to enable on a well validated board.

BUG=b:357011633
TEST=LowerBasicMemTestSize UPD is set when lower_basic_mem_test_size
     is set

Change-Id: I465e9c138ac8f2079bfd506add4667201a8fa533
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85130
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jeremy Compostella 2024-11-12 10:27:53 -08:00 • committed by Subrata Banik
commit 38fd03dfea
1 changed files with 1 additions and 0 deletions
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src/soc/intel/pantherlake/romstage/fsp_params.c
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@ -79,6 +79,7 @@ static void fill_fspm_mrc_params(FSP_M_CONFIG *m_cfg,
m_cfg->RMT = config->rmt;
m_cfg->MrcFastBoot = 1;
m_cfg->LowerBasicMemTestSize = config->lower_basic_mem_test_size;
}
static void fill_fspm_cpu_params(FSP_M_CONFIG *m_cfg,