From 38fd03dfea97b78e100a30862d41b1d775d0b526 Mon Sep 17 00:00:00 2001 From: Jeremy Compostella Date: Tue, 12 Nov 2024 10:27:53 -0800 Subject: [PATCH] soc/intel/pantherlake: Bind SoC config to LowerBasicMemTestSize UPD The lower_basic_mem_test_size SoC setting (LowerBasicMemTestSize UPD) request FSP-M to reduce the size of memory tested after memory training. This option reduces the boot time. This is considered a safe option to enable on a well validated board. BUG=b:357011633 TEST=LowerBasicMemTestSize UPD is set when lower_basic_mem_test_size is set Change-Id: I465e9c138ac8f2079bfd506add4667201a8fa533 Signed-off-by: Jeremy Compostella Reviewed-on: https://review.coreboot.org/c/coreboot/+/85130 Reviewed-by: Kapil Porwal Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) --- src/soc/intel/pantherlake/romstage/fsp_params.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/intel/pantherlake/romstage/fsp_params.c b/src/soc/intel/pantherlake/romstage/fsp_params.c index e6ed19ec85..83481a01f4 100644 --- a/src/soc/intel/pantherlake/romstage/fsp_params.c +++ b/src/soc/intel/pantherlake/romstage/fsp_params.c @@ -79,6 +79,7 @@ static void fill_fspm_mrc_params(FSP_M_CONFIG *m_cfg, m_cfg->RMT = config->rmt; m_cfg->MrcFastBoot = 1; + m_cfg->LowerBasicMemTestSize = config->lower_basic_mem_test_size; } static void fill_fspm_cpu_params(FSP_M_CONFIG *m_cfg,