mb/gigabyte/ga-h77m-d3h/devicetree.cb: Re-enable IGD and PCIe VGA

Commit 7d8e105420 ("mb/gigabyte/ga-h77m-d3h: Add Sandy/Ivy Bridge
board GA-H77M-D3H"), adding this board, initially enabled igd and
peg10 in the device tree, but later, during review, Patchset 10
removed those lines of the device tree entirely, disabling onboard
and PCIe graphics in the port as ultimately submitted.

This commit re-adds these lines to the device tree, enabling both -
thanks to nic3-14159 for spotting the issue. I have confirmed both
now work on my GA-H77M-D3H.

TEST=Confirm IGD outputs as configured in SeaBIOS and Linux (with
CONFIG_ONBOARD_VGA_IS_PRIMARY), same for PCIe GPU (running option
ROMs).

$ lspci
00:00.0 Host bridge: Intel Corporation Xeon E3-1200 v2/3rd Gen Core
processor DRAM Controller (rev 09)
00:02.0 VGA compatible controller: Intel Corporation Xeon E3-1200 
v2/3rd Gen Core processor Graphics Controller (rev 09)
...

With a monitor connected to the onboard DVI:

$ cat /sys/class/graphics/fb0/virtual_size
1920,1080

Change-Id: I248827b92d9f14cedbbd666d533764b5f152cf29
Signed-off-by: Dodoid <git-noreply@dodoid.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89681
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>

src/mainboard/gigabyte/ga-h77m-d3h/devicetree.cb

@@ -3,6 +3,11 @@
 chip northbridge/intel/sandybridge
 	register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}"
 	device domain 0 on
+		device ref peg10 on end
+		device ref igd on
+			subsystemid 0x1458 0xd000
+		end
+
 		chip southbridge/intel/bd82x6x	# Intel Series 7 Panther Point PCH
 			register "gen1_dec" = "0x003c0a01"