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soc/intel/meteorlake: Configure PmcPchLpmS0ixSubStateEnableMask

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Only PmcLpmS0ixSubStateEnableMask is currently configured, and
PmcPchLpmS0ixSubStateEnableMask is left with the default value.

These should be the same.

Change-Id: I71bebec251c5c336407c2c173af29ddbfde0691b
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89448
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Sean Rhodes 2025-10-07 15:55:48 +01:00
commit 375847acfe
1 changed files with 3 additions and 0 deletions
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3
src/soc/intel/meteorlake/fsp_params.c
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@ -659,6 +659,9 @@ static void fill_fsps_misc_power_params(FSP_S_CONFIG *s_cfg,
/* Enable the energy efficient turbo mode */
s_cfg->EnergyEfficientTurbo = 1;
s_cfg->PmcLpmS0ixSubStateEnableMask = get_supported_lpm_mask();
#if CONFIG(PLATFORM_USES_FSP2_X86_32)
s_cfg->PmcPchLpmS0ixSubStateEnableMask = get_supported_lpm_mask();
#endif
/* Apply minimum assertion width settings if non-zero */
if (config->pch_slp_s3_min_assertion_width)