From 375847acfe99fac54ee1d38798589ed1df0d286b Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Tue, 7 Oct 2025 15:55:48 +0100 Subject: [PATCH] soc/intel/meteorlake: Configure PmcPchLpmS0ixSubStateEnableMask MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Only PmcLpmS0ixSubStateEnableMask is currently configured, and PmcPchLpmS0ixSubStateEnableMask is left with the default value. These should be the same. Change-Id: I71bebec251c5c336407c2c173af29ddbfde0691b Signed-off-by: Sean Rhodes Reviewed-on: https://review.coreboot.org/c/coreboot/+/89448 Tested-by: build bot (Jenkins) Reviewed-by: Jérémy Compostella Reviewed-by: Matt DeVillier --- src/soc/intel/meteorlake/fsp_params.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index 0ad32a3e5e..0502b757c5 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -659,6 +659,9 @@ static void fill_fsps_misc_power_params(FSP_S_CONFIG *s_cfg, /* Enable the energy efficient turbo mode */ s_cfg->EnergyEfficientTurbo = 1; s_cfg->PmcLpmS0ixSubStateEnableMask = get_supported_lpm_mask(); +#if CONFIG(PLATFORM_USES_FSP2_X86_32) + s_cfg->PmcPchLpmS0ixSubStateEnableMask = get_supported_lpm_mask(); +#endif /* Apply minimum assertion width settings if non-zero */ if (config->pch_slp_s3_min_assertion_width)