sb/intel: Add soc/gpio.h
In order to use the common gpio.h header file typedef gpio_t in soc/gpio.h for Intel common code, Intel lynxpoint and Intel broadwell. Change-Id: I2049a2cfd75c60d00bdd564b294808760b6aff7f Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/88502 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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5 changed files with 40 additions and 3 deletions
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src/soc/intel/broadwell/include/soc/gpio.h
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src/soc/intel/broadwell/include/soc/gpio.h
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@ -0,0 +1,10 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _BROADWELL_GPIO_H_
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#define _BROADWELL_GPIO_H_
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#include <stdint.h>
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typedef uint32_t gpio_t;
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#endif /* _BROADWELL_GPIO_H_ */
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@ -53,3 +53,9 @@ smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM) += pmutil.c smihandler.c
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smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE) += finalize.c
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all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC) += rtc.c
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ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO),y)
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CPPFLAGS_common += -I$(src)/southbridge/intel/common/include
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endif
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@ -4,6 +4,7 @@
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#define INTEL_COMMON_GPIO_H
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#include <stdint.h>
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#include <soc/gpio.h>
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/* ICH7 GPIOBASE */
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#define GPIO_USE_SEL 0x00
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@ -31,9 +32,6 @@
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#define GPIO_NO_INVERT 0
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#define GPIO_INVERT 1
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#define GPIO_LEVEL_LOW 0
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#define GPIO_LEVEL_HIGH 1
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#define GPIO_NO_BLINK 0
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#define GPIO_BLINK 1
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src/southbridge/intel/common/include/soc/gpio.h
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src/southbridge/intel/common/include/soc/gpio.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef SB_INTEL_COMMON_GPIO_BANKS_H
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#define SB_INTEL_COMMON_GPIO_BANKS_H
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#include <stdint.h>
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typedef uint32_t gpio_t;
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#define GPIO_LEVEL_LOW 0
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#define GPIO_LEVEL_HIGH 1
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#endif /* SB_INTEL_COMMON_GPIO_BANKS_H */
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src/southbridge/intel/lynxpoint/include/soc/gpio.h
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src/southbridge/intel/lynxpoint/include/soc/gpio.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef SB_INTEL_LYNXPOINT_GPIO_BANKS_H
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#define SB_INTEL_LYNXPOINT_GPIO_BANKS_H
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#include <stdint.h>
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typedef uint32_t gpio_t;
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#endif /* SB_INTEL_LYNXPOINT_GPIO_BANKS_H */
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