diff --git a/src/soc/intel/broadwell/include/soc/gpio.h b/src/soc/intel/broadwell/include/soc/gpio.h
new file mode 100644
index 0000000000..8cd1e1fa79
--- /dev/null
+++ b/src/soc/intel/broadwell/include/soc/gpio.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef _BROADWELL_GPIO_H_
+#define _BROADWELL_GPIO_H_
+
+#include <stdint.h>
+
+typedef uint32_t gpio_t;
+
+#endif /* _BROADWELL_GPIO_H_ */
diff --git a/src/southbridge/intel/common/Makefile.mk b/src/southbridge/intel/common/Makefile.mk
index 2f4c777561..39cb1b985e 100644
--- a/src/southbridge/intel/common/Makefile.mk
+++ b/src/southbridge/intel/common/Makefile.mk
@@ -53,3 +53,9 @@ smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM) += pmutil.c smihandler.c
 smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE) += finalize.c
 
 all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC) += rtc.c
+
+ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO),y)
+
+CPPFLAGS_common += -I$(src)/southbridge/intel/common/include
+
+endif
diff --git a/src/southbridge/intel/common/gpio.h b/src/southbridge/intel/common/gpio.h
index 687886525f..6dd2acbacc 100644
--- a/src/southbridge/intel/common/gpio.h
+++ b/src/southbridge/intel/common/gpio.h
@@ -4,6 +4,7 @@
 #define INTEL_COMMON_GPIO_H
 
 #include <stdint.h>
+#include <soc/gpio.h>
 
 /* ICH7 GPIOBASE */
 #define GPIO_USE_SEL	0x00
@@ -31,9 +32,6 @@
 #define GPIO_NO_INVERT		0
 #define GPIO_INVERT		1
 
-#define GPIO_LEVEL_LOW		0
-#define GPIO_LEVEL_HIGH		1
-
 #define GPIO_NO_BLINK		0
 #define GPIO_BLINK		1
 
diff --git a/src/southbridge/intel/common/include/soc/gpio.h b/src/southbridge/intel/common/include/soc/gpio.h
new file mode 100644
index 0000000000..1e9d4a63b8
--- /dev/null
+++ b/src/southbridge/intel/common/include/soc/gpio.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef SB_INTEL_COMMON_GPIO_BANKS_H
+#define SB_INTEL_COMMON_GPIO_BANKS_H
+
+#include <stdint.h>
+
+typedef uint32_t gpio_t;
+
+#define GPIO_LEVEL_LOW		0
+#define GPIO_LEVEL_HIGH		1
+
+#endif /* SB_INTEL_COMMON_GPIO_BANKS_H */
diff --git a/src/southbridge/intel/lynxpoint/include/soc/gpio.h b/src/southbridge/intel/lynxpoint/include/soc/gpio.h
new file mode 100644
index 0000000000..9f869ff077
--- /dev/null
+++ b/src/southbridge/intel/lynxpoint/include/soc/gpio.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef SB_INTEL_LYNXPOINT_GPIO_BANKS_H
+#define SB_INTEL_LYNXPOINT_GPIO_BANKS_H
+
+#include <stdint.h>
+
+typedef uint32_t gpio_t;
+
+#endif /* SB_INTEL_LYNXPOINT_GPIO_BANKS_H */