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mb/asus/p8z77-v: Apply vendor PCH interrupt mapping

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Got this information from Bill Xie while troubleshooting CB:85413.
Apply the differences from vendor to coreboot.

Change-Id: I56f4314eca101cdfcac12594115d373472d1e1db
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86191
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Bill XIE <persmule@hardenedlinux.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Keith Hui 2025-01-28 10:11:40 -05:00 • committed by Matt DeVillier
commit 273e84976b
1 changed files with 16 additions and 0 deletions
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16
src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c
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@ -2,6 +2,7 @@
#include <bootblock_common.h>
#include <device/pnp_ops.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <superio/nuvoton/common/nuvoton.h>
#include <superio/nuvoton/nct6779d/nct6779d.h>
@ -9,6 +10,21 @@
#define SERIAL_DEV PNP_DEV(CONFIG_SUPERIO_NUVOTON_PNP_BASE, NCT6779D_SP1)
#define ACPI_DEV PNP_DEV(CONFIG_SUPERIO_NUVOTON_PNP_BASE, NCT6779D_ACPI)
void mainboard_late_rcba_config(void)
{
RCBA32(D31IP) = (INTC << D31IP_TTIP) | (INTB << D31IP_SIP2) |
(INTC << D31IP_SMIP) | (INTB << D31IP_SIP);
RCBA32(D22IP) = (INTB << D22IP_KTIP) | (INTC << D22IP_IDERIP) |
(INTB << D22IP_MEI2IP) | (INTA << D22IP_MEI1IP);
DIR_ROUTE(D31IR, PIRQA, PIRQC, PIRQD, PIRQA);
DIR_ROUTE(D29IR, PIRQH, PIRQD, PIRQA, PIRQC);
DIR_ROUTE(D27IR, PIRQG, PIRQB, PIRQC, PIRQD);
DIR_ROUTE(D26IR, PIRQA, PIRQF, PIRQC, PIRQD);
DIR_ROUTE(D25IR, PIRQE, PIRQF, PIRQG, PIRQH);
DIR_ROUTE(D22IR, PIRQA, PIRQD, PIRQC, PIRQB);
}
void bootblock_mainboard_early_init(void)
{
nuvoton_pnp_enter_conf_state(GLOBAL_DEV);