mb/starlabs/starbook/kbl: Remove PMC GPIO routing

Change-Id: Ibb92d76f15be71ecb1e2187c7e235235585f8793
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84275
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Sean Rhodes 2024-09-09 12:56:49 +01:00
commit 26b3847269

View file

@ -26,16 +26,6 @@ chip soc/intel/skylake
register "PmConfigSlpSusMinAssert" = "3" # 500ms
register "PmConfigSlpAMinAssert" = "3" # 2s
# PM Util
# GPE configuration
# Note that GPE events called out in ASL code rely on this
# route. i.e. If this route changes then the affected GPE
# offset bits also need to be changed.
# sudo devmem2 0xfe001920 (pmc_bar + GPIO_GPE_CFG)
register "gpe0_dw0" = "GPP_B"
register "gpe0_dw1" = "GPP_C"
register "gpe0_dw2" = "GPP_E"
# Enable the correct decode ranges on the LPC bus.
register "lpc_ioe" = "LPC_IOE_EC_4E_4F |
LPC_IOE_KBC_60_64 |