mb/starlabs/starbook/kbl: Alphabetize and group FSP UPDs

Change-Id: I5beda22208fe17338d4136f9d38fd50e55054b01
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84274
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Sean Rhodes 2024-09-09 12:56:31 +01:00
commit 2e1aa62839

View file

@ -1,7 +1,7 @@
chip soc/intel/skylake
# CPU
# Enable Enhanced Intel SpeedStep
# FPD UPDs
register "eist_enable" = "true"
register "SaGv" = "SaGv_Enabled"
# Graphics
# IGD Displays
@ -14,10 +14,6 @@ chip soc/intel/skylake
.backlight_pwm_hz = 200, // PWM
}"
# FSP Memory
register "SaGv" = "SaGv_Enabled"
# FSP Silicon
# Serial I/O
register "SerialIoDevMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci,