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soc/mediatek/mt8188: Adjust memlayout for bootblock

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Increase the bootblock size to 70K to accommodate its growth, e.g.,
CB:90147 and CB:89157.

This commit also conditionally includes the DRAM_INIT_CODE section when
ENV_ROMSTAGE is enabled, and the BOOTBLOCK section otherwise. This
allows increased BOOTBLOCK overlapping with DRAM_INIT_CODE as these two
sections won't be utilized in the same boot stage.

TEST=emerge-geralt coreboot

Change-Id: Ib7b930fbb1815d2f24b9618d94a38d02c66eab97
Signed-off-by: Yidi Lin <yidilin@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90251
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Filip Lewiński <filip.lewinski@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Chen-Tsung Hsieh <chentsung@google.com>
This commit is contained in:
Yidi Lin 2025-11-27 20:32:09 +08:00
commit 2462e3a027
1 changed files with 9 additions and 6 deletions
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15
src/soc/mediatek/mt8188/include/soc/memlayout.ld
View file

@ -33,18 +33,21 @@ SECTIONS
* can't reconfigure whole L3 as SRAM).
*/
SRAM_L2C_START(0x00200000)
/*
* The bootROM needs 4K starting from SRAM_L2C_START so the bootblock starting address
* is fixed at SRAM_L2C_START + 4K, and the 4K can be reused after bootblock is started.
* To move the address, gen-bl-img.py also needs to be modified accordingly.
*/
BOOTBLOCK(0x00201000, 60K)
#if ENV_ROMSTAGE
/*
* The needed size can be obtained by:
* aarch64-cros-linux-gnu-objdump -x dram.elf | grep memsz
* To move the address, dram.elf also needs to be modified accordingly.
*/
DRAM_INIT_CODE(0x00210000, 300K)
#else
/*
* The bootROM needs 4K starting from SRAM_L2C_START so the bootblock starting address
* is fixed at SRAM_L2C_START + 4K, and the 4K can be reused after bootblock is started.
* To move the address, gen-bl-img.py also needs to be modified accordingly.
*/
BOOTBLOCK(0x00201000, 70K)
#endif
OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x0025b000, 272K)
PRERAM_CBFS_CACHE(0x0029f000, 48K)
PRERAM_CBMEM_CONSOLE(0x002ab000, 340K)