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exynos: stack size: Increase the stack size to 16KB.

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The lzma decoding function in the RAM stage allocates nearly 16KB on the stack
which is shared between the bootblock, rom stage, and ram stage. The stack had
been much too small and needed to be expanded.

BUG=chrome-os-partner:19420
TEST=Built and booted on snow and pit.
BRANCH=None

Change-Id: I1b74fff9b54e506320d58956b779b3a102e66868
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/65937
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
This commit is contained in:
Gabe Black 2013-08-13 21:01:13 -07:00 • committed by ChromeBot
commit 243d8a80f6
2 changed files with 13 additions and 13 deletions
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8
src/cpu/samsung/exynos5250/Kconfig
View file

@ -69,21 +69,21 @@ config STACK_TOP
config STACK_BOTTOM
hex
default 0x02077000
default 0x02074000
config STACK_SIZE
hex
default 0x1000
default 0x4000
# TODO We may probably move this to board-specific implementation files instead
# of KConfig values.
config CBFS_CACHE_ADDRESS
hex "memory address to put CBFS cache data"
default 0x02060000
default 0x0205c000
config CBFS_CACHE_SIZE
hex "size of CBFS cache data"
default 0x000017000
default 0x00018000
config SYS_SDRAM_BASE
hex

18
src/cpu/samsung/exynos5420/Kconfig
View file

@ -46,12 +46,12 @@ config CBFS_ROM_OFFSET
# 0x0202_4400: variable length bootblock checksum header.
# 0x0202_4410: bootblock, assume up to 32KB in size
# 0x0203_0000: romstage, assume up to 128KB in size.
# 0x0206_0000: cache for CBFS data.
# 0x0205_c000: cache for CBFS data.
# 0x0206_f000: stack bottom
# 0x0207_3000: stack pointer
# 0x0207_3000: shared (with kernel) page for cpu & secondary core states.
# the shared data is currently only <0x50 bytes so we can share
# this page with stack.
# 0x0207_3100: stack bottom
# 0x0207_4000: stack pointer
config BOOTBLOCK_BASE
hex
@ -63,7 +63,7 @@ config ROMSTAGE_BASE
config ROMSTAGE_SIZE
hex
default 0x10000
default 0x20000
# Stack may reside in either IRAM or DRAM. We will define it to live
# at the top of IRAM for now.
@ -72,25 +72,25 @@ config ROMSTAGE_SIZE
# consecutive memory locations ending just below SP
config STACK_TOP
hex
default 0x02074000
default 0x02073000
config STACK_BOTTOM
hex
default 0x02073100
default 0x0206f000
config STACK_SIZE
hex
default 0x0f00
default 0x4000
# TODO We may probably move this to board-specific implementation files instead
# of KConfig values.
config CBFS_CACHE_ADDRESS
hex "memory address to put CBFS cache data"
default 0x02060000
default 0x0205c000
config CBFS_CACHE_SIZE
hex "size of CBFS cache data"
default 0x000013000
default 0x00013000
config SYS_SDRAM_BASE
hex