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mb/google/fatcat: Remove redundant GPIOs for x1 slot

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The following GPIOs are already implemented in fw_config.c based on
CBI values:

- GPP_A08: X1_PCIE_SLOT_PWR_EN
- GPP_B25: X1_SLOT_WAKE_N
- GPP_D19: X1_DT_PCIE_RST_N

This change removes the redundant GPIO definitions from gpio.c.

BUG=b:376019977
TEST=Able to build and boot google/fatcat with functional x1 slot.

Change-Id: I56c6fd3ea8b9e58933548543d195621da94c882e
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85523
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Pranava Y N <pranavayn@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Subrata Banik 2024-12-06 23:42:19 +05:30
commit 230e646d98
1 changed files with 0 additions and 6 deletions
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6
src/mainboard/google/fatcat/variants/fatcat/gpio.c
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@ -28,8 +28,6 @@ static const struct pad_config gpio_table[] = {
/* GPP_A06: ESPI_RST_EC_R_N */
/* GPP_A06 : GPP_A06 ==> ESPI_RST_HDR configured on reset, do not touch */
/* GPP_A08: X1_PCIE_SLOT_PWR_EN */
PAD_CFG_GPO(GPP_A08, 1, PLTRST),
/* GPP_A09: M.2_WWAN_FCP_OFF_N */
PAD_CFG_GPO(GPP_A09, 1, PLTRST),
/* GPP_A10: M.2_WWAN_DISABLE_N */
@ -101,8 +99,6 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_B23, NONE, DEEP, NF4),
/* GPP_B24: ESPI_ALERT0_EC_R_N */
PAD_NC(GPP_B24, NONE),
/* GPP_B25: X1_SLOT_WAKE_N */
PAD_CFG_GPI_SCI_LOW(GPP_B25, NONE, DEEP, LEVEL),
/* GPP_C00: GPP_C0_SMBCLK */
PAD_CFG_NF(GPP_C00, NONE, DEEP, NF1),
@ -187,8 +183,6 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
/* GPP_D18: CLKREQ6_X4_GEN4_M2_SSD_N */
PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
/* GPP_D19: X1_DT_PCIE_RST_N */
PAD_CFG_GPO(GPP_D19, 1, PLTRST),
/* GPP_D20: CSE_EARLY_SW */
PAD_CFG_GPI_SCI_HIGH(GPP_D20, NONE, DEEP, LEVEL),
/* GPP_D21: GPP_D21_UFS_REFCLK */