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soc/intel/pantherlake: Use CPU ID mask for all stepping

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This commit refactors the handling of CPU IDs for the Pantherlake and
Wildcat Lake series by using a single CPU ID mask instead of listing
each individual stepping. This change simplifies the code by reducing
redundancy and making it easier to manage CPU IDs.

Previously, each stepping of the Pantherlake series had its own entry,
which led to unnecessary complexity. By consolidating these into a
single entry with a mask, we improve maintainability and reduce
potential errors.

These modifications do not affect the existing functionality but
streamline the codebase for future updates and maintenance.

TEST=CPU ID c06c1 is properly identified as "Pantherlake".

Change-Id: Ie52ed860c096a3d157ae6580aeedf3acb8c723ab
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89375
Reviewed-by: Bora Guvendik <bora.guvendik@intel.corp-partner.google.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jeremy Compostella 2025-09-29 16:07:56 -07:00 • committed by Jérémy Compostella
commit 21f6ccf3a4
3 changed files with 7 additions and 16 deletions
Download patch file Download diff file Expand all files Collapse all files

7
src/include/cpu/intel/cpu_ids.h
View file

@ -86,10 +86,7 @@
#define CPUID_LUNARLAKE_A0_1 0xb06d0
#define CPUID_LUNARLAKE_A0_2 0xb06d1
#define CPUID_ARROWLAKE_H_A0 0xc0652
#define CPUID_PANTHERLAKE_A0 0xc06c0
#define CPUID_PANTHERLAKE_B0_1 0xc06c1
#define CPUID_PANTHERLAKE_B0_2 0xc06c2
#define CPUID_PANTHERLAKE_B0_3 0xc06c3
#define CPUID_PANTHERLAKE 0xc06c0
#define CPUID_SNOWRIDGE_A0 0x80660
#define CPUID_SNOWRIDGE_A1 0x80661
#define CPUID_SNOWRIDGE_A2 0x80662
@ -97,6 +94,6 @@
#define CPUID_SNOWRIDGE_B0 0x80664
#define CPUID_SNOWRIDGE_B1 0x80665
#define CPUID_SNOWRIDGE_C0 0x80667
#define CPUID_WILDCATLAKE_A0 0xd0650
#define CPUID_WILDCATLAKE 0xd0650
#endif /* CPU_INTEL_CPU_IDS_H */

7
src/soc/intel/common/block/cpu/mp_init.c
View file

@ -32,11 +32,8 @@ static struct device_operations cpu_dev_ops = {
};
static const struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, CPUID_WILDCATLAKE_A0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_PANTHERLAKE_A0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_PANTHERLAKE_B0_1, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_PANTHERLAKE_B0_2, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_PANTHERLAKE_B0_3, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_WILDCATLAKE, CPUID_ALL_STEPPINGS_MASK },
{ X86_VENDOR_INTEL, CPUID_PANTHERLAKE, CPUID_ALL_STEPPINGS_MASK },
{ X86_VENDOR_INTEL, CPUID_LUNARLAKE_A0_1, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_LUNARLAKE_A0_2, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_METEORLAKE_A0_1, CPUID_EXACT_MATCH_MASK },

9
src/soc/intel/pantherlake/bootblock/report_platform.c
View file

@ -20,11 +20,8 @@ static struct {
u32 cpuid;
const char *name;
} cpu_table[] = {
{ CPUID_PANTHERLAKE_A0, "Pantherlake A0" },
{ CPUID_PANTHERLAKE_B0_1, "Pantherlake B0" },
{ CPUID_PANTHERLAKE_B0_2, "Pantherlake B0" },
{ CPUID_PANTHERLAKE_B0_3, "Pantherlake B0" },
{ CPUID_WILDCATLAKE_A0, "Wildcatlake A0" },
{ CPUID_PANTHERLAKE, "Pantherlake" },
{ CPUID_WILDCATLAKE, "Wildcatlake" },
};
static struct {
@ -187,7 +184,7 @@ static void report_cpu_info(void)
/* Look for string to match the name */
for (i = 0; i < ARRAY_SIZE(cpu_table); i++) {
if (cpu_table[i].cpuid == cpu_id) {
if (cpuid_match(cpu_table[i].cpuid, cpu_id, CPUID_ALL_STEPPINGS_MASK)) {
cpu_type = cpu_table[i].name;
break;
}