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mb/getac/p470: Use common gpio functions

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Use existing common code instead of directly accessing GPIO
I/O registers. Makes code more readable.

Change-Id: Ieebf37372f1c44a877ef6e77eecaa9049bf3aec4
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Patrick Rudolph 2025-07-26 09:21:48 +02:00 • committed by Matt DeVillier
commit 21639c3771
2 changed files with 12 additions and 22 deletions
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26
src/mainboard/getac/p470/early_init.c
View file

@ -1,33 +1,25 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h>
#include <stdint.h>
#include <arch/io.h>
#include <bootblock_common.h>
#include <console/console.h>
#include <device/pnp_ops.h>
#include <device/pci_ops.h>
#include <option.h>
#include <console/console.h>
#include <gpio.h>
#include <northbridge/intel/i945/i945.h>
#include <option.h>
#include <stdint.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
void mainboard_pre_raminit_config(int s3_resume)
{
u32 gpios;
printk(BIOS_SPEW, "\n Initializing drive bay...\n");
gpios = inl(DEFAULT_GPIOBASE + 0x38); // GPIO Level 2
gpios |= (1 << 0); // GPIO33 = ODD
gpios |= (1 << 1); // GPIO34 = IDE_RST#
outl(gpios, DEFAULT_GPIOBASE + 0x38); /* GP_LVL2 */
gpios = inl(DEFAULT_GPIOBASE + 0x0c); // GPIO Level
gpios &= ~(1 << 13); // ??
outl(gpios, DEFAULT_GPIOBASE + 0x0c); /* GP_LVL */
gpio_set(33, 1); // GPIO33 = ODD
gpio_set(34, 1); // GPIO34 = IDE_RST#
gpio_set(13, 0); // ??
printk(BIOS_SPEW, "\n Initializing Ethernet NIC...\n");
gpios = inl(DEFAULT_GPIOBASE + 0x0c); // GPIO Level
gpios &= ~(1 << 24); // Enable LAN Power
outl(gpios, DEFAULT_GPIOBASE + 0x0c); /* GP_LVL */
gpio_set(24, 0); // Enable LAN Power
}
/* Override the default lpc decode ranges */

8
src/mainboard/getac/p470/smihandler.c
View file

@ -3,10 +3,11 @@
#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <ec/acpi/ec.h>
#include <gpio.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
#include <soc/nvs.h>
#include <southbridge/intel/common/gpio.h>
#include <ec/acpi/ec.h>
#include "ec_oem.c"
#define MAX_LCD_BRIGHTNESS 0xd8
@ -14,7 +15,6 @@
int mainboard_io_trap_handler(int smif)
{
u8 reg8;
u32 reg32;
switch (smif) {
case 0x2b:
@ -95,9 +95,7 @@ int mainboard_io_trap_handler(int smif)
break;
case 0xde:
printk(BIOS_DEBUG, "LAN power off\n");
reg32 = inl(DEFAULT_GPIOBASE + GP_LVL);
reg32 |= (1 << 24); // Disable LAN Power
outl(reg32, DEFAULT_GPIOBASE + GP_LVL);
gpio_set(24, 0); // Disable LAN Power
break;
case 0xdf:
printk(BIOS_DEBUG, "RF enable\n");