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mb/starlabs/starbook/cml: Remove PMC GPIO routing

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These aren't used so remove them.

Change-Id: I6b9cf29843047bff9a37f82b899ff1d10b206888
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84265
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Sean Rhodes 2024-09-09 12:38:18 +01:00
commit 21443bccda
1 changed files with 0 additions and 10 deletions
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10
src/mainboard/starlabs/starbook/variants/cml/devicetree.cb
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@ -28,16 +28,6 @@ chip soc/intel/cannonlake
register "PchPmSlpSusMinAssert" = "3" # 500ms
register "PchPmSlpAMinAssert" = "3" # 2s
# PM Util
# GPE configuration
# Note that GPE events called out in ASL code rely on this
# route. i.e. If this route changes then the affected GPE
# offset bits also need to be changed.
# sudo devmem2 0xfe001920 (pmc_bar + GPIO_GPE_CFG)
register "gpe0_dw0" = "PMC_GPP_B"
register "gpe0_dw1" = "PMC_GPP_C"
register "gpe0_dw2" = "PMC_GPP_E"
# PCIe Clock
register "PcieClkSrcClkReq[0]" = "PCIE_CLK_NOTUSED"
register "PcieClkSrcClkReq[2]" = "PCIE_CLK_NOTUSED"