mb/purism/librem_l1um_v2/ramstage.c: Use DEV_PTR macro

Use the DEV_PTR macro to resolve devicetree aliases instead of using the
autogenerated reference names from sconfig directly.

TEST=Timeless build did not change

Change-Id: I4ff06bb3a8256d5fe215cab659f33ec404264e21
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85093
Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
This commit is contained in:
Nicholas Chin 2024-10-05 21:59:07 -06:00 committed by Felix Singer
commit 2007792b08

View file

@ -26,13 +26,13 @@ static void mainboard_final(void *chip_info)
* Control Register), but we have to use one of the LDNs as the device
* because the chip ops are only assigned to the LDNs.
*/
pnp_enter_conf_mode(_dev_nvt_superio_gpio1_ptr);
pnp_enter_conf_mode(DEV_PTR(nvt_superio_gpio1));
printk(BIOS_DEBUG, "GCR 0x2f was: %02X\n",
pnp_read_config(_dev_nvt_superio_gpio1_ptr, 0x2f));
pnp_write_config(_dev_nvt_superio_gpio1_ptr, 0x2f, 0x00);
pnp_read_config(DEV_PTR(nvt_superio_gpio1), 0x2f));
pnp_write_config(DEV_PTR(nvt_superio_gpio1), 0x2f, 0x00);
printk(BIOS_DEBUG, "GCR 0x2f is now: %02X\n",
pnp_read_config(_dev_nvt_superio_gpio1_ptr, 0x2f));
pnp_exit_conf_mode(_dev_nvt_superio_gpio1_ptr);
pnp_read_config(DEV_PTR(nvt_superio_gpio1), 0x2f));
pnp_exit_conf_mode(DEV_PTR(nvt_superio_gpio1));
}
struct chip_operations mainboard_ops = {