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mb/google/brya/constitution: Enable RTD3 for SSD to resolve S0ix issue

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Some SSDs block the CPU from reaching C10 during the S0ix suspend
without the RTD3 configuration. Add PCIe RTD3 support so NVMe gets
placed into D3 state when entering S0ix.

Enable and reset GPIOs are configured as per pin mapping in gpio.c.

BUG=b:391612392
TEST=Run suspend_stress_test on constitution device and verify that
the device suspends to S0ix.

Change-Id: Ia367911d6d55b1f769c1660a6f42118988975621
Signed-off-by: Pranava Y N <pranavayn@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86686
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Pranava Y N 2025-03-03 11:54:29 +05:30 • committed by Subrata Banik
commit 1ec46a45c4
1 changed files with 7 additions and 0 deletions
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7
src/mainboard/google/brya/variants/constitution/overridetree.cb
View file

@ -145,6 +145,13 @@ chip soc/intel/alderlake
.clk_src = 0,
.flags = PCIE_RP_LTR | PCIE_RP_AER,
}"
chip soc/intel/common/block/pcie/rtd3
register "is_storage" = "true"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F14)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B4)"
register "srcclk_pin" = "0"
device generic 0 on end
end
end
device ref tcss_dma0 on
chip drivers/intel/usb4/retimer