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soc/mediatek/mt8196: Remove unused LVTS controllers

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Controller2 and controller3 are disabled, so remove them from source
code.

BRANCH=rauru
BUG=b:389026545
TEST=Boot up to kernel

Signed-off-by: Zhaoqing Jiu <zhaoqing.jiu@mediatek.corp-partner.google.com>
Change-Id: I69c1e76e7de544fd4e24e8e94e4f676de783e205
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86687
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Zhaoqing Jiu 2025-03-03 16:19:33 +08:00 • committed by Yidi Lin
commit 1b7e1adc90
2 changed files with 0 additions and 85 deletions
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20
src/soc/mediatek/mt8196/include/soc/thermal_internal.h
View file

@ -23,28 +23,18 @@ enum lvts_sensor {
L_TS_LVTS12_1, /* LVTS12-1 SOC-BOT */
L_TS_LVTS12_2, /* LVTS12-2 SOC-BOT */
L_TS_LVTS12_3, /* LVTS12-3 SOC-BOT */
L_TS_LVTS13_0, /* LVTS13-0 MD-AP */
L_TS_LVTS13_1, /* LVTS13-1 MD-AP */
L_TS_LVTS13_2, /* LVTS13-2 MD-AP */
L_TS_LVTS13_3, /* LVTS13-3 MD-AP */
L_TS_LVTS14_0, /* LVTS14-0 SOC-ADCT */
L_TS_LVTS14_3, /* LVTS14-3 SOC-ADCT */
L_TS_LVTS_NUM,
};
enum lvts_tc {
LVTS_AP_CONTROLLER0 = 0,
LVTS_AP_CONTROLLER1,
LVTS_AP_CONTROLLER2,
LVTS_AP_CONTROLLER3,
LVTS_CONTROLLER_NUM,
};
enum lvts_tc_offset {
TS_OFFSET_AP_CONTROLLER0 = 0,
TS_OFFSET_AP_CONTROLLER1 = 0x100,
TS_OFFSET_AP_CONTROLLER2 = 0x200,
TS_OFFSET_AP_CONTROLLER3 = 0x300,
};
enum sensor_switch_status {
@ -52,11 +42,6 @@ enum sensor_switch_status {
SEN_ON,
};
enum controller_switch_status {
CTRL_OFF,
CTRL_ON,
};
struct lvts_thermal_controller_speed {
uint32_t group_interval_delay;
uint32_t period_unit;
@ -67,7 +52,6 @@ struct lvts_thermal_controller_speed {
struct lvts_thermal_controller {
enum lvts_sensor ts[MAX_TS_NUMBER];
enum sensor_switch_status sensor_on_off[MAX_TS_NUMBER];
enum controller_switch_status ctrl_on_off;
size_t ts_number;
int reboot_temperature;
int dominator_ts_idx;
@ -80,10 +64,6 @@ static struct mtk_thermal_controller_regs *const
mtk_lvts_ap_controller0 = (void *)(THERM_CTRL_BASE + TS_OFFSET_AP_CONTROLLER0);
static struct mtk_thermal_controller_regs *const
mtk_lvts_ap_controller1 = (void *)(THERM_CTRL_BASE + TS_OFFSET_AP_CONTROLLER1);
static struct mtk_thermal_controller_regs *const
mtk_lvts_ap_controller2 = (void *)(THERM_CTRL_BASE + TS_OFFSET_AP_CONTROLLER2);
static struct mtk_thermal_controller_regs *const
mtk_lvts_ap_controller3 = (void *)(THERM_CTRL_BASE + TS_OFFSET_AP_CONTROLLER3);
struct mtk_thermal_controller_regs {
u32 lvtsmonctl0_0;

65
src/soc/mediatek/mt8196/thermal.c
View file

@ -40,7 +40,6 @@ static const struct lvts_thermal_controller lvts_tscpu_g_tc[LVTS_CONTROLLER_NUM]
[LVTS_AP_CONTROLLER0] = { /* SOC-TOP */
.ts = {L_TS_LVTS11_0, L_TS_LVTS11_1, L_TS_LVTS11_2, L_TS_LVTS11_3},
.sensor_on_off = {SEN_ON, SEN_ON, SEN_ON, SEN_ON},
.ctrl_on_off = CTRL_ON,
.ts_number = 4,
.reboot_temperature = 118800,
.dominator_ts_idx = 0,
@ -55,7 +54,6 @@ static const struct lvts_thermal_controller lvts_tscpu_g_tc[LVTS_CONTROLLER_NUM]
[LVTS_AP_CONTROLLER1] = { /* SOC-BOT */
.ts = {L_TS_LVTS12_0, L_TS_LVTS12_1, L_TS_LVTS12_2, L_TS_LVTS12_3},
.sensor_on_off = {SEN_ON, SEN_ON, SEN_ON, SEN_ON},
.ctrl_on_off = CTRL_ON,
.ts_number = 4,
.reboot_temperature = 118800,
.dominator_ts_idx = 0,
@ -67,36 +65,6 @@ static const struct lvts_thermal_controller lvts_tscpu_g_tc[LVTS_CONTROLLER_NUM]
},
.regs = mtk_lvts_ap_controller1,
},
[LVTS_AP_CONTROLLER2] = { /* MD-AP */
.ts = {L_TS_LVTS13_0, L_TS_LVTS13_1, L_TS_LVTS13_2, L_TS_LVTS13_3},
.sensor_on_off = {SEN_ON, SEN_ON, SEN_ON, SEN_ON},
.ctrl_on_off = CTRL_OFF,
.ts_number = 4,
.reboot_temperature = 118800,
.dominator_ts_idx = 0,
.speed = {
.group_interval_delay = 0x7fff,
.period_unit = 0x001,
.filter_interval_delay = 0x001,
.sensor_interval_delay = 0x001,
},
.regs = mtk_lvts_ap_controller2,
},
[LVTS_AP_CONTROLLER3] = { /* SOC-ADCT */
.ts = {L_TS_LVTS14_0, L_TS_LVTS14_3},
.sensor_on_off = {SEN_ON, SEN_ON},
.ctrl_on_off = CTRL_OFF,
.ts_number = 2,
.reboot_temperature = 118800,
.dominator_ts_idx = 0,
.speed = {
.group_interval_delay = 0x7fff,
.period_unit = 0x001,
.filter_interval_delay = 0x001,
.sensor_interval_delay = 0x001,
},
.regs = mtk_lvts_ap_controller3,
},
};
static uint32_t golden_temp;
@ -175,9 +143,6 @@ static void lvts_efuse_setting(void)
for (i = 0; i < ARRAY_SIZE(lvts_tscpu_g_tc); i++) {
const struct lvts_thermal_controller *tc = &lvts_tscpu_g_tc[i];
if (tc->ctrl_on_off == CTRL_OFF)
continue;
val_0 = 0;
val_1 = 0;
for (j = 0; j < tc->ts_number; j++) {
@ -235,9 +200,6 @@ static void lvts_device_identification(void)
printk(BIOS_INFO, "===== %s begin ======\n", __func__);
for (i = 0; i < ARRAY_SIZE(lvts_tscpu_g_tc); i++) {
const struct lvts_thermal_controller *tc = &lvts_tscpu_g_tc[i];
if (tc->ctrl_on_off == CTRL_OFF)
continue;
/* Enable LVTS_CTRL Clock */
write32(&tc->regs->lvtsclken_0, 0x00000001);
@ -268,10 +230,6 @@ static void lvts_device_enable_init_all_devices(void)
uint8_t cali_0, cali_1;
for (i = 0; i < ARRAY_SIZE(lvts_tscpu_g_tc); i++) {
const struct lvts_thermal_controller *tc = &lvts_tscpu_g_tc[i];
if (tc->ctrl_on_off == CTRL_OFF)
continue;
/* Stop Counting (RG_TSFM_ST=0) */
lvts_write_device(LVTS_DEVICE_WRITE_CONFIG, 0x03, 0x00, i);
@ -406,9 +364,6 @@ static void read_all_tc_lvts_temperature(void)
for (i = 0; i < ARRAY_SIZE(lvts_tscpu_g_tc); i++) {
const struct lvts_thermal_controller *tc = &lvts_tscpu_g_tc[i];
if (tc->ctrl_on_off == CTRL_OFF)
continue;
for (j = 0; j < tc->ts_number; j++)
lvts_tscpu_thermal_read_tc_temp(tc, j);
}
@ -442,8 +397,6 @@ static void lvts_disable_all_sensing_points(void)
for (i = 0; i < ARRAY_SIZE(lvts_tscpu_g_tc); i++) {
const struct lvts_thermal_controller *tc = &lvts_tscpu_g_tc[i];
if (tc->ctrl_on_off == CTRL_OFF)
continue;
write32(&tc->regs->lvtsmonctl0_0, LVTS_SINGLE_SENSE_MODE_EN);
}
}
@ -456,9 +409,6 @@ static int lvts_check_all_sensing_points_idle(void)
mask = BIT(10) | BIT(7) | BIT(0);
for (i = 0; i < ARRAY_SIZE(lvts_tscpu_g_tc); i++) {
const struct lvts_thermal_controller *tc = &lvts_tscpu_g_tc[i];
if (tc->ctrl_on_off == CTRL_OFF)
continue;
temp = read32(&tc->regs->lvtsmsrctl1_0);
if ((temp & mask) != 0)
return -1;
@ -483,9 +433,6 @@ static void lvts_enable_all_sensing_points(void)
for (i = 0; i < ARRAY_SIZE(lvts_tscpu_g_tc); i++) {
const struct lvts_thermal_controller *tc = &lvts_tscpu_g_tc[i];
if (tc->ctrl_on_off == CTRL_OFF)
continue;
lvts_enable_sensing_points(tc);
}
}
@ -500,9 +447,6 @@ static void lvts_set_init_flag(void)
for (i = 0; i < ARRAY_SIZE(lvts_tscpu_g_tc); i++) {
const struct lvts_thermal_controller *tc = &lvts_tscpu_g_tc[i];
if (tc->ctrl_on_off == CTRL_OFF)
continue;
printk(BIOS_INFO, "%s %d:%zu, tc_base_addr:%p\n", __func__, i,
tc->ts_number, tc->regs);
@ -553,9 +497,6 @@ static void lvts_tscpu_thermal_initial_all_tc(void)
for (i = 0; i < ARRAY_SIZE(lvts_tscpu_g_tc); i++) {
const struct lvts_thermal_controller *tc = &lvts_tscpu_g_tc[i];
if (tc->ctrl_on_off == CTRL_OFF)
continue;
/* set sensor index of LVTS */
write32(&tc->regs->lvtstssel_0, LVTS_SENSOR_POINT_SELECTION_SETTING);
/* set calculation scale rules */
@ -624,9 +565,6 @@ static void lvts_config_all_tc_hw_protect(void)
for (i = 0; i < ARRAY_SIZE(lvts_tscpu_g_tc); i++) {
const struct lvts_thermal_controller *tc = &lvts_tscpu_g_tc[i];
if (tc->ctrl_on_off == CTRL_OFF)
continue;
lvts_set_tc_trigger_hw_protect(tc);
}
}
@ -637,9 +575,6 @@ static bool lvts_lk_init_check(void)
for (i = 0; i < ARRAY_SIZE(lvts_tscpu_g_tc); i++) {
const struct lvts_thermal_controller *tc = &lvts_tscpu_g_tc[i];
if (tc->ctrl_on_off == CTRL_OFF)
continue;
/* Check LVTS device ID */
if ((read32(&tc->regs->lvtsspare[0]) & GENMASK(11, 0)) != LVTS_MAGIC)
return false;