mb/google/skywalker: Add SD card configurations

Pass SD card detect GPIO to payloads for SD card detection and configure
SD card in ramstage. Currently, only Skywalker supports the SD card.

BUG=b:379008996
BRANCH=none
TEST=Build pass. Check storage in depthcharge.
firmware-shell: storage init
*  0: UFS LUN 0
   1: removable mtk_mmc

Signed-off-by: Mengqi Zhang <mengqi.zhang@mediatek.corp-partner.google.com>
Change-Id: I3b198d5e237006c299581ab4a5da8577dbcca7a6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87884
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Mengqi Zhang 2025-03-03 16:20:06 +08:00 committed by Yidi Lin
commit 16ff3b33ce
3 changed files with 17 additions and 0 deletions

View file

@ -9,6 +9,9 @@ config BOARD_GOOGLE_SKYWALKER_COMMON
if BOARD_GOOGLE_SKYWALKER_COMMON
config SKYWALKER_SDCARD_INIT
def_bool BOARD_GOOGLE_SKYWALKER
config VBOOT
select EC_GOOGLE_CHROMEEC_SWITCHES
select VBOOT_VBNV_FLASH
@ -31,6 +34,8 @@ config BOARD_SPECIFIC_OPTIONS
select FW_CONFIG
select FW_CONFIG_SOURCE_CHROMEEC_CBI
select RTC
select COMMONLIB_STORAGE
select COMMONLIB_STORAGE_MMC
config MAINBOARD_DIR
string

View file

@ -41,6 +41,13 @@ void fill_lb_gpios(struct lb_gpios *gpios)
{GPIO_GSC_AP_INT_ODL.id, ACTIVE_HIGH, -1, "TPM interrupt"},
};
lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
if (CONFIG(SKYWALKER_SDCARD_INIT)) {
struct lb_gpio sd_card_gpios[] = {
{ GPIO_SD_CD_ODL.id, ACTIVE_LOW, -1, "SD card detect" },
};
lb_add_gpios(gpios, sd_card_gpios, ARRAY_SIZE(sd_card_gpios));
}
}
int cr50_plat_irq_status(void)

View file

@ -4,6 +4,8 @@
#include <gpio.h>
#include <soc/bl31.h>
#include <soc/dpm_v2.h>
#include <soc/msdc.h>
#include <soc/mt6359p.h>
#include <soc/spm_common.h>
#include <soc/usb.h>
@ -23,6 +25,9 @@ static void mainboard_init(struct device *dev)
spm_init();
power_on_fpmcu();
if (CONFIG(SKYWALKER_SDCARD_INIT))
mtk_msdc_configure_sdcard();
if (CONFIG(ARM64_USE_ARM_TRUSTED_FIRMWARE))
register_reset_to_bl31(GPIO_AP_EC_WARM_RST_REQ.id, true);
}